2009 15th IEEE Symposium on Asynchronous Circuits and Systems
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9780769536163, 9781424439331

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.24 ◽

2009 ◽

Cited By ~ 5

Author(s):

William Toms ◽

Doug Edwards

Keyword(s):

Synthesis Method ◽

Combinational Logic ◽

Logic Blocks

Download Full-text

Bottleneck Analysis and Alleviation in Pipelined Systems: A Fast Hierarchical Approach

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.20 ◽

2009 ◽

Cited By ~ 12

Author(s):

Gennette Gill ◽

Montek Singh

Keyword(s):

Hierarchical Approach ◽

Bottleneck Analysis

Download Full-text

Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.11 ◽

2009 ◽

Cited By ~ 5

Author(s):

Masashi Imai ◽

Kouei Takada ◽

Takashi Nanya

Keyword(s):

Threshold Voltage ◽

Reduction Method ◽

Power Reduction ◽

Leakage Power ◽

Fine Grain

Download Full-text

The Lackey Self-Timed Switch-Fabric Design Framework

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.22 ◽

2009 ◽

Author(s):

Scott Fairbanks

Keyword(s):

Design Framework ◽

Switch Fabric ◽

Fabric Design

Download Full-text

Fault Tolerant Delay Insensitive Inter-chip Communication

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.21 ◽

2009 ◽

Cited By ~ 21

Author(s):

Yebin Shi ◽

Steve B. Furber ◽

Jim Garside ◽

Luis A. Plana

Keyword(s):

Fault Tolerant

Download Full-text

An Automatic Approach to Generate Haste Code from Simulink Specifications

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.19 ◽

2009 ◽

Cited By ~ 5

Author(s):

Maurizio Tranchero ◽

Leonardo M. Reyneri ◽

Arjan Bink ◽

Mark de Wit

Download Full-text

GHz Asynchronous SRAM in 65nm

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.23 ◽

2009 ◽

Cited By ~ 10

Author(s):

Jonathan Dama ◽

Andrew Lines

Download Full-text

Reducing Power Consumption with Relaxed Quasi Delay-Insensitive Circuits

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.9 ◽

2009 ◽

Cited By ~ 4

Author(s):

Christopher LaFrieda ◽

Rajit Manohar

Keyword(s):

Power Consumption ◽

Reducing Power

Download Full-text

Modular Approach to Multi-resource Arbiter Design

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.16 ◽

2009 ◽

Cited By ~ 9

Author(s):

Stanislavs Golubcovs ◽

Delong Shang ◽

Fei Xia ◽

Andrey Mokhov ◽

Alex Yakovlev

Keyword(s):

Modular Approach

Download Full-text

Heuristic Based throughput Analysis and Optimization of Asynchronous Pipelines

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.31 ◽

2009 ◽

Cited By ~ 10

Author(s):

Alexander Smirnov ◽

Alexander Taubin

Keyword(s):

Throughput Analysis

Download Full-text

2009 15th IEEE Symposium on Asynchronous Circuits and SystemsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks

Bottleneck Analysis and Alleviation in Pipelined Systems: A Fast Hierarchical Approach

Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors

The Lackey Self-Timed Switch-Fabric Design Framework

Fault Tolerant Delay Insensitive Inter-chip Communication

An Automatic Approach to Generate Haste Code from Simulink Specifications

GHz Asynchronous SRAM in 65nm

Reducing Power Consumption with Relaxed Quasi Delay-Insensitive Circuits

Modular Approach to Multi-resource Arbiter Design

Heuristic Based throughput Analysis and Optimization of Asynchronous Pipelines

2009 15th IEEE Symposium on Asynchronous Circuits and Systems
Latest Publications