2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers
Latest Publications

TOTAL DOCUMENTS

178

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780358538

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

UltraSPARC-III: a 3rd generation 64 b SPARC microprocessor

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839837 ◽

2002 ◽

Cited By ~ 5

Author(s):

G. Lauterbach ◽

D. Greenley ◽

S. Ahmed ◽

M. Boffey ◽

J. Chamdani ◽

...

Download Full-text

Ultra-wide dynamic range 1.75 dB noise-figure, 900 MHz CMOS LNA

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839824 ◽

2002 ◽

Cited By ~ 7

Author(s):

G. Gramegna ◽

A. Magazzu ◽

G. Sclafani ◽

M. Paparo

Keyword(s):

Dynamic Range ◽

Noise Figure ◽

Wide Dynamic Range ◽

Cmos Lna

Download Full-text

Two phase non-overlapping clock adiabatic differential cascode voltage switch logic (ADCVSL)

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839817 ◽

2002 ◽

Cited By ~ 1

Author(s):

D. Suvakovic ◽

C. Salama

Keyword(s):

Two Phase

Download Full-text

An eight channel 35 GSample/s CMOS timing analyzer

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839735 ◽

2002 ◽

Cited By ~ 16

Author(s):

D. Weinlader ◽

Ron Ho ◽

Chih-Kong Keng Yang ◽

M. Horowitz

Download Full-text

A 550 MSample/s 8-tap FIR digital filter for magnetic recording read channels

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839700 ◽

2002 ◽

Cited By ~ 1

Author(s):

R. Slaszewski ◽

K. Muhammad ◽

P. Balsara

Keyword(s):

Digital Filter ◽

Magnetic Recording ◽

Fir Digital Filter

Download Full-text

On-chip inductance modeling of VLSI interconnects

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839736 ◽

2002 ◽

Author(s):

Xiaoning Qi ◽

B. Kleveland ◽

Zhiping Yu ◽

S. Wong ◽

R. Dutton ◽

...

Keyword(s):

Vlsi Interconnects ◽

On Chip

Download Full-text

A combined 10/125 Mbaud twisted-pair line driver with programmable performance/power features

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839796 ◽

2002 ◽

Cited By ~ 1

Author(s):

A. Shoval ◽

O. Shoaei ◽

R. Leonowich

Keyword(s):

Twisted Pair ◽

Line Driver

Download Full-text

Antifuse EPROM circuit for field programmable DRAM

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839836 ◽

2002 ◽

Cited By ~ 3

Author(s):

Joo-Sun Choi ◽

Jae-Kyung Wee ◽

Ho-Youb Cho ◽

Phil-Jung Kim ◽

Jin-Keun Oh ◽

...

Keyword(s):

Field Programmable

Download Full-text

A 7.1 GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839768 ◽

2002 ◽

Author(s):

Yong-Ha Park ◽

Seon-Ho Han ◽

Jung-Su Kim ◽

Se-Joong Lee ◽

Jeong-Hun Kook ◽

...

Keyword(s):

Low Power ◽

Embedded Memory ◽

3D Rendering ◽

Rendering Engine ◽

2D Array

Download Full-text

A 550 Mb/s GMR read/write amplifier using 0.5 μm 5 V CMOS process

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers ◽

10.1109/isscc.2000.839815 ◽

2002 ◽

Cited By ~ 1

Author(s):

S. Lamb ◽

L. Cheng ◽

D. Young

Keyword(s):

Cmos Process

Download Full-text

2000 IEEE International Solid-State Circuits Conference Digest of Technical PapersLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

UltraSPARC-III: a 3rd generation 64 b SPARC microprocessor

Ultra-wide dynamic range 1.75 dB noise-figure, 900 MHz CMOS LNA

Two phase non-overlapping clock adiabatic differential cascode voltage switch logic (ADCVSL)

An eight channel 35 GSample/s CMOS timing analyzer

A 550 MSample/s 8-tap FIR digital filter for magnetic recording read channels

On-chip inductance modeling of VLSI interconnects

A combined 10/125 Mbaud twisted-pair line driver with programmable performance/power features

Antifuse EPROM circuit for field programmable DRAM

A 7.1 GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS

A 550 Mb/s GMR read/write amplifier using 0.5 μm 5 V CMOS process

2000 IEEE International Solid-State Circuits Conference Digest of Technical Papers
Latest Publications