2009 14th IEEE European Test Symposium
Latest Publications

TOTAL DOCUMENTS

39

(FIVE YEARS 0)

H-INDEX

9

(FIVE YEARS 0)

Published By IEEE

9780769537030

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Resource-Efficient Programmable Trigger Units for Post-Silicon Validation

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.35 ◽

2009 ◽

Cited By ~ 21

Author(s):

Ho Fai Ko ◽

Nicola Nicolici

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Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.18 ◽

2009 ◽

Cited By ~ 2

Author(s):

V. Malandruccolo ◽

M. Ciappa ◽

W. Fichtner ◽

H. Rothleitner

Keyword(s):

Integrated Circuits ◽

Stress Test ◽

Gate Oxide ◽

Automotive Applications ◽

Oxide Stress

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Built-in Test Solutions for the Electrode Structures in Bio-Fluidic Microsystems

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.24 ◽

2009 ◽

Cited By ~ 9

Author(s):

Q. Al-Gayem ◽

H. Liu ◽

A. Richardson ◽

N. Burd

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Increasing Robustness of SAT-based Delay Test Generation Using Efficient Dynamic Learning Techniques

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.13 ◽

2009 ◽

Cited By ~ 2

Author(s):

Stephan Eggersgluss ◽

Rolf Drechsler

Keyword(s):

Test Generation ◽

Delay Test ◽

Dynamic Learning ◽

Learning Techniques

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Test Encoding for Extreme Response Compaction

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.22 ◽

2009 ◽

Cited By ~ 2

Author(s):

Michael A. Kochte ◽

Stefan Holst ◽

Melanie Elm ◽

Hans-Joachim Wunderlich

Keyword(s):

Extreme Response

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Concurrent Self-Test with Partially Specified Patterns for Low Test Latency and Overhead

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.26 ◽

2009 ◽

Cited By ~ 11

Author(s):

Michael A. Kochte ◽

Christian G. Zoellin ◽

Hans-Joachim Wunderlich

Keyword(s):

Self Test

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On Minimization of Peak Power for Scan Circuit during Test

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.36 ◽

2009 ◽

Cited By ~ 15

Author(s):

Jaynarayan T. Tudu ◽

Erik Larsson ◽

Virendra Singh ◽

Vishwani D. Agrawal

Keyword(s):

Peak Power

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Speed-Path Debug Using At-Speed Scan Test Patterns

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.12 ◽

2009 ◽

Cited By ~ 6

Author(s):

Ruifeng Guo ◽

Wu-Tung Cheng ◽

Kun-Han Tsai

Keyword(s):

Scan Test

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A Two Phase Approach for Minimal Diagnostic Test Set Generation

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.33 ◽

2009 ◽

Cited By ~ 14

Author(s):

Mohammed Ashfaq Shukoor ◽

Vishwani D. Agrawal

Keyword(s):

Diagnostic Test ◽

Two Phase ◽

Test Set ◽

Phase Approach

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Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip

2009 14th IEEE European Test Symposium ◽

10.1109/ets.2009.20 ◽

2009 ◽

Cited By ~ 1

Author(s):

Kihyuk Han ◽

Joonsung Park ◽

Jae Wook Lee ◽

Jacob A. Abraham ◽

Eonjo Byun ◽

...

Keyword(s):

Low Complexity ◽

Test Chip

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