TUNABLE ELECTRON-SPIN POLARIZATION BY δ-POTENTIAL IN LAYERED SEMICONDUCTOR NANOSTRUCTURE

We theoretically explore how to control electron-spin polarization in layered semiconductor nanostructure (LSN) by a [Formula: see text]-potential realized by atomic-layer doping. Due to Rashba spin-orbit coupling, a considerable spin polarization still remains even through a [Formula: see text]-potential is embedded in the LSN. Spin polarization ratio can be controlled by altering weight or position of [Formula: see text]-potential. Based on such an LSN, a structurally-tunable electron-spin filter may be obtained for spintronics device applications.

Electrically controlled spin polarized current in Dirac semimetals

We propose a highly tunable 100% spin-polarized current generated in a spintronics device based on Dirac semimetal under a magnetic field, which can be achieved merely by controlling electric parameters, i.e. the gate voltage, the barrier in the lead and the coupling strength between the leads and Dirac semimetal. These parameters are all related to the special properties of Dirac semimetal and Weyl semimetal. The spin polarized current generated by gate voltage is guaranteed by its semimetallic feature, because of which the density of state vanishes near Dirac nodes. The barrier controlled current results from the different distance of Weyl nodes generated by the Zeeman field. And the coupling strength controlled spin polarized current originate from the surface Fermi arcs. All these features make a great potential to realized Dirac semimetal based spintronic devices.

Spin-polarized dwell time for electrons in a δ-doped magnetic nanostructure

We theoretically investigate dwell time for electrons in a magnetic nanostructure with a [Formula: see text]-doping, which is formed on [Formula: see text] heterostructure by depositing a ferromagnetic (FM) stripe. We find that dwell time depends strongly on electron-spins owing to Zeeman coupling and broken symmetry. We also demonstrate that spin-polarized dwell time can be manipulated by [Formula: see text]-doping. Thus, electron spins can be separated in time dimension and such a magnetic nanostructure can be employed as a structurally-controllable temporal spin splitter for spintronics device applications.

Rashba Effect on Buckled Square Lattice Ge and Sn chalcogenides (MX, M=Ge,Sn, X=O,S,Se,Te) using DFT method

The Rashba splitting are found in the buckled square lattice. Here, by applying fully relativistic density-functional theory (DFT) calculation, we confirm the existence of the Rashba splitting in the conduction band minimum of various two-dimensional MX monochalcogenides (M = Ge, Sn and X = S, Se, Te) exhibiting a pair inplane Rashba rotation of the spin textures. A strong correlation has also been found between the size of the Rashba parameter and the atomic number of chalcogen atom for Γ and M point in the first Brillouin zone. Our investigation clarifies that the buckled square lattice are promising for inducing the substantial Rashba splitting suggesting that the present system is promising for spintronics device.

Exchange-dependent spin polarized transport and phase transition in a triple monomer molecule

Exchange-dependent multi-functional molecular spintronics device based on a triple monomer molecule.

A Recent Progress of Spintronics Devices for Integrated Circuit Applications

Nonvolatile (NV) memory is a key element for future high-performance and low-power microelectronics. Among the proposed NV memories, spintronics-based ones are particularly attractive for applications, owing to their low-voltage and high-speed operation capability in addition to their high-endurance feature. There are three types of spintronics devices with different writing schemes: spin-transfer torque (STT), spin-orbit torque (SOT), and electric field (E-field) effect on magnetic anisotropy. The NV memories using STT have been studied and developed most actively and are about to enter into the market by major semiconductor foundry companies. On the other hand, a development of the NV memories using other writing schemes are now underway. In this review article, first, the recent advancement of the spintronics device using STT and the NV memories using them are reviewed. Next, spintronics devices using the other two writing schemes (SOT and E-field) are briefly reviewed, including issues to be addressed for the NV memories application.