From Use Case to Use Case Slices

A use case has been widely adopted for requirements specification, which can be created on a high abstraction level or a very detailed level. A use case with a very detailed level can be a lot more useful for requirements elicitation, but such a model may become too complex and difficult to understand the whole context. A use case slice is introduced in order to simplify the requirements analysis and ensure the correctness of software incremental development process (e.g., the agile development process). However, a use case is usually divided into multiple use case slices in a manual way. Some errors may occur during this manual process. In this article, the authors present an automated approach for dividing a use case into use case slices. The approach first decomposes a use case into multiple use case stories, and then these stories can be composed into different use case slices according to different requirements. These use case slices cover all the functionality of the original use case. The authors give a decomposition theory and propose the corresponding algorithm. A case study demonstrates these results.

A Survey of Assignments in Undergraduate Computer Architecture Courses

Computer architecture is an essential topic in undergraduate Computer Science (CS) curricula. Teaching computer architecture courses to CS students can be challenging, as the concepts are on a high abstraction level and not easy to grasp for students. Learning of computer architecture abstracts is strongly reinforced by hands-on assignment experience. This paper presents results from a survey of assignments from 40 undergraduate computer architecture courses, which are offered in 40 CS departments. These surveyed courses are selected from universities listed among the 120 top North America universities by the Webometrics Ranking of World Universities 2015. The information used for this survey is based solely on material publicly accessible on the websites of courses.

Design and Implementation of Binary Utilities Generator

This paper presents a framework for generating assembler and disassembler from ADL (architecture description language), which enables processor architecture designers to explore a large design space by quickly modifying the architecture description written in high abstraction level ADL. We present our ADL: GADL(GNU tool chain based ADL) and propose the binary utilities generation algorithms for GADL. Some issues are discussed and resolved which have not been covered by related research. We have implemented the binary utilities generator with the proposed algorithms and used it to generate the binary utilities for a DSP we are designing, which shows the efficiency of the algorithms.