loop track
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2020 ◽  
Vol 78 ◽  
pp. 249-267
Author(s):  
Pingxin Wang ◽  
Hailong Yu ◽  
Xiaoting Rui ◽  
Jianshu Zhang ◽  
Junjie Gu

Author(s):  
Miao Huo ◽  
Zongmin Wang ◽  
Tieliang Zhang ◽  
Song Yang ◽  
Lei Zhang ◽  
...  
Keyword(s):  

2013 ◽  
Vol 756-759 ◽  
pp. 4302-4305
Author(s):  
Zheng Ping Zhang ◽  
Yong Lu Wang ◽  
Ming Liu

A high speed open-loop track/hold circuit in 0.18um CMOS process is presented. Open-loop and differential architecture are adopted to obtain high bandwidth and high speed;time-interleaved structure is used to reach a high sampling rate;source negative feedback and offset compensation are used to improve the linearity of the circuit.Simulation results show that with 396.875MHz input, 1.6GSPS sampling rate, driving the pre-amplifier of ADC, the thack/hold circuits SFDR(spurious-free dynamic range) is 75.8dB,satisfying the demand of 12 bits ADC.The circuit features high sampling rate,wide bandwidth,high SFDR and universal.


Author(s):  
Pieter Harpe ◽  
Athon Zanikopoulos ◽  
Hans Hegt ◽  
Arthur van Roermund
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2006 ◽  
Author(s):  
Andrew R. Plummer ◽  
Colin J. Dodds
Keyword(s):  

Manufacturing ◽  
2002 ◽  
Author(s):  
Stephen J. Derby ◽  
John McFadden

A novel closed loop track based multi-head robot has been developed to increase material handing throughput. This robot allows for waves of robot heads to move materials in the working path by eliminating the traditional return path. Programmable clutching of a constant moving drive chain supplies the source of motion around the loop. This paper discusses the design and impact of such a system configuration, and looks at the required distributed control system.


Author(s):  
Stephen J. Derby ◽  
David Brown

A novel closed loop track based multi-head robot has been developed to increase material handing throughput. This robot allows for waves of autonomous robot heads to move materials in the working path by eliminating the traditional return path. Distributed control architecture was developed using a system comprising of desktop, embedded and single board PC’s, some linked by infrared communications. This paper discusses the design and impact of such a control architecture, and looks at some performance boundaries.


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