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2018 ◽  
Vol 7 (3.12) ◽  
pp. 701
Author(s):  
Pushpa Mala S ◽  
Bharath S P ◽  
Anjum . ◽  
Aniket Kumar ◽  
Debolina Kundu

Minimizing Power dissipation is one of the major concerns in the VLSI industry.Due the rapid growth in technology, there is a tremendous reduction in the chip size. Minimum power consumption has become a priority.In this paper, we propose a low power design techniquefor Ring counter using gated clock.In this paper, we demonstrate the working of ring counter using gated clock.The results are illustrated in Xilinx. The simulation results and the synthesis outputis shown.  


Author(s):  
L V Santosh Kumar Y

in today’s advance electronic and communication systems the role of high accuracy analog to digital converters are of great importance. Nowadays, a larger percentage of mixed-signal applications requires for health care systems. Also the speed of the chosen ADC design matters a lot as we are connected with the real world signals. SAR based ADC will provides us a better solution for various analog to digital systems. It is an essential device whenever data from the analog world, through sensors or transducers, should be digitally processed or when transmitting data between chips through either long-range wireless links or high-speed transmission between chips on the same printed circuit board. The paper projects up down and ring counter as a logic for successive approximation register (SAR logic for a ADC that is one of the best suited for low power. Here the resolution is of 4-bit and a power consumption of few milli watts. SAR ADC is implemented in 45 nm nano-meter scaling technology CMOS technology with a power supply of 0.5v by maintaining 4:1 w/l ratio.


Author(s):  
Daniel W Gebretsadik ◽  
Jens Hardell ◽  
Braham Prakash

Due to new environmental regulations, Pb-free engine bearing materials are becoming more common and there is a need for studying their tribological performance. Under severe operating conditions, failure due to seizure can occur in engine bearings. In this work, seizure behaviour of different multi-layered engine bearing materials has been studied by using a block-on-ring test setup under dry condition. These materials included Al–Sn-based lining with no overlay, bronze lining with polyamide-imide-based overlay containing MoS2 and graphite, bronze lining with two overlays of Al–Sn-based and polyamide-imide-based material, bronze-based lining with Sn-based overlay and bismuth (Bi)-containing bronze with Sn-based overlay. The tests were performed by gradually increasing the load at a specific time interval and in a stepwise manner and at a constant speed under unidirectional dry sliding conditions. The test materials, counter surfaces and the wear debris were analysed using SEM with a view to understand the seizure mechanisms. Bronze-based lining with a polyamide-imide-based overlay containing MoS2 and graphite does not exhibit seizure up to a load of 475 N. For Al–Sn-based lining without overlay, seizure occurs at a relatively lower load of 125 N. The Al–Sn-based lining with no overlay shows higher friction and the polyamide-imide-based overlay containing MoS2 and graphite shows lower friction during the seizure test. In most cases, there is material transfer onto the test ring counter surface. Material transfer onto the counter surface either due to severe adhesion or wear debris adhered and smeared on it. Al–Sn-based lining and an exposed Al–Sn-based overlay show severe adhesion that causes seizure. On the other hand, exposed Pb containing lining and Bi containing lining seize due to mechanical interlocking caused by the adhered wear debris on both surfaces.


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