asynchronous vlsi Latest Research Papers

Survey On asynchronous VLSI Design

International Journal of Recent Advancement in Engineering & Research ◽

10.24128/ijraer.2017.yz23ef ◽

2017 ◽

Vol 2 (12) ◽

pp. 11

Author(s):

Rashmi Reddy

Keyword(s):

Vlsi Design ◽

Asynchronous Vlsi

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Low Power Asynchronous VLSI with NEM Relays

2014 20th IEEE International Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2014.19 ◽

2014 ◽

Cited By ~ 3

Author(s):

Benjamin Z. Tang ◽

Sunil A. Bhave ◽

Rajit Manohar

Keyword(s):

Low Power ◽

Asynchronous Vlsi

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Profiling Multilevel Partitioning for Asynchronous VLSI Distributed Simulation

Communications in Computer and Information Science - AsiaSim 2013 ◽

10.1007/978-3-642-45037-2_29 ◽

2013 ◽

pp. 310-324 ◽

Cited By ~ 1

Author(s):

Elias Tsirogiannis ◽

Georgios Theodoropoulos

Keyword(s):

Distributed Simulation ◽

Asynchronous Vlsi

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New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits

Microelectronics Reliability ◽

10.1016/j.microrel.2008.11.007 ◽

2009 ◽

Vol 49 (2) ◽

pp. 186-198 ◽

Cited By ~ 1

Author(s):

Miljana Sokolović ◽

Vančo Litovski ◽

Mark Zwolinski

Keyword(s):

Vlsi Circuits ◽

Yield Estimation ◽

Worst Case ◽

New Concepts ◽

Asynchronous Vlsi

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A Designer's Guide to Asynchronous VLSI

10.1017/cbo9780511674730 ◽

2009 ◽

Cited By ~ 101

Author(s):

Peter A. Beerel ◽

Recep O. Ozdag ◽

Marcos Ferretti

Keyword(s):

Asynchronous Vlsi

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New concepts of worst-case delay evaluation in asynchronous VLSI SoC

2008 26th International Conference on Microelectronics ◽

10.1109/icmel.2008.4559301 ◽

2008 ◽

Author(s):

M. Sokolovic ◽

M. Zwolinski ◽

V. Litovski

Keyword(s):

Worst Case ◽

New Concepts ◽

Asynchronous Vlsi

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A Case Study On Asynchronous VLSI Design Platform

2007 IEEE Conference on Electron Devices and Solid-State Circuits ◽

10.1109/edssc.2007.4450336 ◽

2007 ◽

Author(s):

Jung-Lin Yang ◽

Wei-Che Hsu ◽

Sung-Min Lin

Keyword(s):

Vlsi Design ◽

Asynchronous Vlsi

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Bidirectional data transfer based asynchronous VLSI system using multiple-valued current mode logic

33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings. ◽

10.1109/ismvl.2003.1201391 ◽

2004 ◽

Cited By ~ 7

Author(s):

T. Hanyu ◽

T. Takahashi ◽

M. Kameyama

Keyword(s):

Data Transfer ◽

Current Mode ◽

Current Mode Logic ◽

Vlsi System ◽

Asynchronous Vlsi

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Architecture design of a fully asynchronous VLSI chip for DSP custom applications

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.1992.230576 ◽

2003 ◽

Author(s):

X. Fan ◽

N. Bergmann

Keyword(s):

Architecture Design ◽

Vlsi Chip ◽

Asynchronous Vlsi

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Asynchronous VLSI architectures for Huffman codecs

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187) ◽

10.1109/iscas.1998.694577 ◽

2002 ◽

Cited By ~ 1

Author(s):

O. Hauck ◽

H. Sauerwein ◽

S.A. Huss

Keyword(s):

Vlsi Architectures ◽

Asynchronous Vlsi

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asynchronous vlsi
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TOTAL DOCUMENTS

H-INDEX

Survey On asynchronous VLSI Design

Low Power Asynchronous VLSI with NEM Relays

Profiling Multilevel Partitioning for Asynchronous VLSI Distributed Simulation

New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits

A Designer's Guide to Asynchronous VLSI

New concepts of worst-case delay evaluation in asynchronous VLSI SoC

A Case Study On Asynchronous VLSI Design Platform

Bidirectional data transfer based asynchronous VLSI system using multiple-valued current mode logic

Architecture design of a fully asynchronous VLSI chip for DSP custom applications

Asynchronous VLSI architectures for Huffman codecs

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asynchronous vlsiRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Survey On asynchronous VLSI Design

Low Power Asynchronous VLSI with NEM Relays

Profiling Multilevel Partitioning for Asynchronous VLSI Distributed Simulation

New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits

A Designer's Guide to Asynchronous VLSI

New concepts of worst-case delay evaluation in asynchronous VLSI SoC

A Case Study On Asynchronous VLSI Design Platform

Bidirectional data transfer based asynchronous VLSI system using multiple-valued current mode logic

Architecture design of a fully asynchronous VLSI chip for DSP custom applications

Asynchronous VLSI architectures for Huffman codecs

asynchronous vlsi
Recently Published Documents