pipelined processors Latest Research Papers

Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS) ◽

10.1109/iolts52814.2021.9486711 ◽

2021 ◽

Author(s):

Riccardo Cantoro ◽

Patrick Girard ◽

Riccardo Masante ◽

Sandro Sartoni ◽

Matteo Sonza Reorda ◽

...

Keyword(s):

Fault Coverage ◽

Transition Fault ◽

Self Test ◽

Pipelined Processors

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Frequency Scaling for High Performance of Low-End Pipelined Processors

Advances in Science Technology and Engineering Systems Journal ◽

10.25046/aj060288 ◽

2021 ◽

Vol 6 (2) ◽

pp. 763-775

Author(s):

Athanasios Tziouvaras ◽

Georgios Dimitriou ◽

Michael Dossis ◽

Georgios Stamoulis

Keyword(s):

High Performance ◽

Frequency Scaling ◽

Pipelined Processors

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Secure and Efficient Software Masking on Superscalar Pipelined Processors

10.1007/978-3-030-92075-3_1 ◽

2021 ◽

pp. 3-32

Author(s):

Barbara Gigerl ◽

Robert Primas ◽

Stefan Mangard

Keyword(s):

Pipelined Processors ◽

Efficient Software

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Instruction-Flow-Based Timing Analysis in Pipelined Processors

2019 Panhellenic Conference on Electronics & Telecommunications (PACET) ◽

10.1109/pacet48583.2019.8956266 ◽

2019 ◽

Author(s):

Athanassios Tziouvaras ◽

Georgios Dimitriou ◽

Michael Dossis ◽

Georgios Stamoulis

Keyword(s):

Timing Analysis ◽

Pipelined Processors

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Instruction-Based Timing Analysis in Pipelined Processors

2019 4th South-East Europe Design Automation, Computer Engineering, Computer Networks and Social Media Conference (SEEDA-CECNSM) ◽

10.1109/seeda-cecnsm.2019.8908287 ◽

2019 ◽

Cited By ~ 1

Author(s):

Athanassios Tziouvaras ◽

Georgios Dimitriou ◽

Michael Dossis ◽

Georgios Stamoulis

Keyword(s):

Timing Analysis ◽

Pipelined Processors

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Achieving full functional coverage for the forwarding unit of pipelined processors

2017 IEEE East-West Design & Test Symposium (EWDTS) ◽

10.1109/ewdts.2017.8110063 ◽

2017 ◽

Author(s):

V S Vineesh ◽

Nihar Hage ◽

B Karthik ◽

Virendra Singh

Keyword(s):

Functional Coverage ◽

Pipelined Processors

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Design and optimization of a divider in pipelined processors based on quotient-try

2017 12th IEEE Conference on Industrial Electronics and Applications (ICIEA) ◽

10.1109/iciea.2017.8282996 ◽

2017 ◽

Author(s):

Zhang Yu ◽

Li Chunqiang ◽

Hu Wei ◽

Shen Huan ◽

Liu Jing

Keyword(s):

Design And Optimization ◽

Pipelined Processors

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Compiler optimization for superscalar and pipelined processors

2016 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) ◽

10.1109/discover.2016.7806224 ◽

2016 ◽

Cited By ~ 1

Author(s):

Vishnu P Bharadwaj ◽

Mahesh Rao

Keyword(s):

Compiler Optimization ◽

Pipelined Processors

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Performance Analysis of Branch Prediction Unit for Pipelined Processors

International Journal of Computer Applications ◽

10.5120/ijca2015906740 ◽

2015 ◽

Vol 128 (16) ◽

pp. 6-12 ◽

Cited By ~ 1

Author(s):

Nikhil Panwar ◽

Manjit Kaur ◽

Gurmohan Singh

Keyword(s):

Performance Analysis ◽

Branch Prediction ◽

Pipelined Processors

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On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors

2013 14th International Workshop on Microprocessor Test and Verification ◽

10.1109/mtv.2013.10 ◽

2013 ◽

Cited By ~ 15

Author(s):

P. Bernardi ◽

R. Cantoro ◽

L. Ciganda ◽

B. Du ◽

E. Sanchez ◽

...

Keyword(s):

Functional Test ◽

Pipelined Processors

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pipelined processors
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Frequency Scaling for High Performance of Low-End Pipelined Processors

Secure and Efficient Software Masking on Superscalar Pipelined Processors

Instruction-Flow-Based Timing Analysis in Pipelined Processors

Instruction-Based Timing Analysis in Pipelined Processors

Achieving full functional coverage for the forwarding unit of pipelined processors

Design and optimization of a divider in pipelined processors based on quotient-try

Compiler optimization for superscalar and pipelined processors

Performance Analysis of Branch Prediction Unit for Pipelined Processors

On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors

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pipelined processorsRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Frequency Scaling for High Performance of Low-End Pipelined Processors

Secure and Efficient Software Masking on Superscalar Pipelined Processors

Instruction-Flow-Based Timing Analysis in Pipelined Processors

Instruction-Based Timing Analysis in Pipelined Processors

Achieving full functional coverage for the forwarding unit of pipelined processors

Design and optimization of a divider in pipelined processors based on quotient-try

Compiler optimization for superscalar and pipelined processors

Performance Analysis of Branch Prediction Unit for Pipelined Processors

On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors

pipelined processors
Recently Published Documents