semiconductor interconnects
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2019 ◽  
Vol 16 (1) ◽  
pp. 21-27
Author(s):  
Wei-Wei Liu (Xenia) ◽  
Berdy Weng ◽  
Jerry Li ◽  
Cing-Kun Yeh

Abstract The Kirkendall void (KV) has been a well-known issue for long term reliability of semiconductor interconnects. KVs exist at the interfaces of Cu and Sn and the growing intermetallic compound (IMC) Cu6Sn5 at the initial stage, and a part of the IMC is converted to Cu3Sn when the environmental stress added. In this article, all the assembled packages pass the condition of unbiased long-term reliability testing, especially for 2,000 cycles of temperature cycling test and 2,000 h of high-temperature storage. A large numbers of KVs was observed after 200 cycles of temperature cycling. Various assembly structures were monitored, and various IMC thicknesses were concluded to be functions of stress test. Cu3Sn, Ni3Sn4, and Cu6Sn5 are not significantly affected by heat, but Ni3Sn4 grows steadily.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000129-000134
Author(s):  
Wei-Wei Liu (Xenia) ◽  
Berdy Weng ◽  
Jerry Li ◽  
CK Yeh

Abstract The kirkendall void had been a well-known issue for long term reliability of semiconductor interconnects, while even the KVs existing at the interfaces of Cu & Sn, it may still be able to pass the condition of un-bias long term reliability testing, especially for 2,000 cycles of temperature cycling test and 2,000hrs of high temperature storage. A large numbers of KVs was observed after 200cycles of temperature cycling test at the intermetallic Cu3Sn layer which locate between the intermetallic Cu6Sn5 & Cu layers. These kinds of voids will growth proportional with the aging time at initial stage, but slowing down attribute to the barrier layer of Cu3Sn & Cu interfaces. This paper compare various IMC thickness as a function of stress test, the Cu3Sn & Cu6Sn5 do affected seriously by heat, but Ni3Sn4 is not affected by heat or moisture.


2014 ◽  
Vol 20 (S3) ◽  
pp. 8-9 ◽  
Author(s):  
L.M. Gignac ◽  
C. Beslin ◽  
J. Gonsalves ◽  
F. Stellari ◽  
C.-C. Lin

Author(s):  
J. D. Hoffman ◽  
B. A. Dow ◽  
R. D. Lorenz

The spatially varying magnetic field within a power electronics package contains information of the semiconductor junction temperature and the interconnect currents, temperature, displacement, and strain. The design of semiconductor interconnects for point field detector based high bandwidth current and strain sensing is investigated using finite element analysis (FEA) and verified by experimental results. High bandwidth (10MHz) current sensing was achieved by interconnect design based field shaping and concentration. A displacement sensing resolution of 0.6 μm was achieved by eddy current based high frequency field shaping. Design methodologies to achieve this multifunctional integration of sensing are the primary new contribution of this work.


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