Improved Electrical Characteristics of Gallium Oxide/P-Epi Silicon Carbide Static Induction Transistors with UV/Ozone Treatment Fabricated by RF Sputter

In this study, static induction transistors (SITs) with beta gallium oxide (β-Ga2O3) channels are grown on a p-epi silicon carbide (SiC) layer via radio frequency sputtering. The Ga2O3 films are subjected to UV/ozone treatment, which results in reduced oxygen vacancies in the X-ray photoelectron spectroscopy data, lower surface roughness (3.51 nm) and resistivity (319 Ω·cm), and higher mobility (4.01 cm2V−1s−1). The gate leakage current is as low as 1.0 × 10−11 A at VGS = 10 V by the depletion layer formed between n-Ga2O3 and p-epi SiC at the gate region with a PN heterojunction. The UV/O3-treated SITs exhibit higher (approximately 1.64 × 102 times) drain current (VDS = 12 V) and on/off ratio (4.32 × 105) than non-treated control devices.

3 kV Normally-Off 4H-SiC Buried Gate Static Induction Transistors (SiC-BGSITs)

3 kV normally-off SiC-buried gate static induction transistors (SiC-BGSITs) were fabricated by using an innovative fabrication process that was used by us previously to fabricate 0.7–1.2 kV SiC-BGSITs. The fabricated device shows the lowest specific on-resistance of 9.16 mΩ·cm2, compared to all other devices of the same class. The threshold voltage of this device was 1.4 V at room temperature and was maintained at values more than 1 V with normally-off characteristics at 200 °C. The device can block drain voltage of 3 kV with a leakage current density of 6.9 mA/cm2.