A Novel Method for Silicon-Beam Fabrication in Wet Etching

Fabricating silicon-beam through the wet etching has been developed for many years, there are a lot of advantages during the wet etching, low cost, easy to obtain and so on. However the design and fabrication of silicon-beam with polygon section has been confined during the process of wet etching; In order to fabricate more kinds of silicon-beam with the advantages of the wet etching, a novel method to fabricate silicon-beam with polygon section is proposed. The fabricating process has been designed by taking advantage of the protection effect of the SiO2 layer.

A Novel Method to Fabricate Silicon-Beam with Polygon Section Based on Thermal Oxidation Layer Protection Technique

Simplex wet etching method to fabricate silicon-beam has limited the categories of silicon-beam, it has confined the design and fabrication of silicon-beam with polygon section. Moreover, due to the side-etching of sidewalls and arris during the process of wet etching, the sections of the fabricated silicon-beam are not identical, which will induce the mechanics characters of silicon-beam to be altered, depressing the quality of silicon-beam; In order to avoid the shortages above, a novel method to fabricate silicon-beam with polygon section based on thermal oxidation layer technique is proposed, thermal oxidation SiO2 layer is utilized as the protection layer of the sidewalls of the silicon-beam instead of the mask layer as usual for the first time. Combining the wet etching technique with the thermal oxidation technique innovatively, several varieties of silicon-beam with polygon section, which can hardly be obtained only by the use of wet etching technique, can be manufactured, respectively. Based on such an innovative method, this paper proposes and develops five varieties of silicon-beam with novel structure by means of adjustable mask layer, extending the application field of wet etching. The subsequent fabrication experiment of silicon-beam with hexagonal section has been taken as an example to validate the technique principle. The dimension parameters of silicon-beam have been tested precisely and the arris angle error between the theoretic value and the experimental measurement is less than 1.5%; The SEM photos with the amplifier of 100 and 250 have been obtained through HITACHI S-4800 field emission scanning electron microscope (FE-SEM), the SEM results have demonstrated the clear sidewall arris without undercut. Through this fabrication method, the sidewall arris of silicon-beam can be maintained due to the protection layer of thermal oxidation SiO2. In this manner, the arris disfigurement of the silicon-beam decreases dramatically, the process of etching can be controlled precisely, and the quality of the silicon-beam has been improved greatly.

Modeling the Boron-Doping Silicon Beam by a Multilayer Model

The boron-doping silicon beam commonly used in microdevices exhibits a nonuniform material property along its thickness or width because of the gradient of boron concentration induced by diffusion process. The constant of rigidity, one of the most important parameters of microbeam, needs to be accurately calculated and designed in the development of high precise sensors and actuators. Current design methods, mainly depending on the analytical solutions derived under the assumption of a uniform material property or some commercial software for a varied property, are not adequate and time consuming to calculate the constant of rigidity of boron-doping silicon beam. A multilayer model is proposed in this paper to replace the continuous solid model by dividing the beam into separated layers glued together. The finite element lamination method is utilized to acquire the equivalent Young modulus and moment of inertia of cross section of multilayer model. The equivalent values are calculated from double-layer structures to multilayer ones based on the small deformation theory and the material mechanics theory. The proposed method provides an effective method to design the stiffness or frequency of microdevice and its results are validated by COMSOL simulation.