Compact model of retention characteristics of ferroelectric FinFET synapse with MFIS gate stack

In this paper, multiple-fin n- and p-channel HfZrO2 ferroelectric-FinFET devices are manufactured using a gate first process with post metalization annealing. The device transfer characteristics upon program and erase operations are measured and modeled. The drift in the transfer characteristics due to depolarization field and charge injection are captured using the shift in the threshold voltage along with time-dependent modeling of vertical field dependent mobility degradation parameters to develop a physical, computationally efficient, and accurate retention model for ferroelectric-FinFET devices. The modeled conductance is incorporated into deep neural network simulation platform CIMulator to analyze the role of conductance drift due to retention degradation, as well as the importance of the gap between high and low conductance states in improving the image recognition accuracy of neural networks.

Modeling Analysis and Comparision of Neural Network Simulation Based on ECM and LSTM

Comparing the prediction effects of traditional econometric algorithm model and deep learning algorithm model, taking regional GDP as an example, two prediction models of ARMA-ECM and LSTM-SVR are established for prediction, and the prediction results of different models are compared and analyzed. The results show that there are some deviations in the prediction results of the two models, but the prediction trends are the same. The prediction accuracy of LSTM-SVR model will decrease significantly with the reduction of time series data samples, while ARMA-ECM model is not so sensitive.