scholarly journals 2-D analytical modeling of dual material gate fully depleted SOI MOSFET with high-k dielectric

2008 ◽  
Vol 57 (6) ◽  
pp. 3807
Author(s):  
Luan Su-Zhen ◽  
Liu Hong-Xia ◽  
Jia Ren-Xu ◽  
Cai Nai-Qiong
Keyword(s):  
Analytical Modeling ◽  
Fully Depleted ◽  
Soi Mosfet ◽  
High K ◽  
High K Dielectric ◽  
Dual Material

scholarly journals Analytical Modeling and Simulation of Nanoscale Fully Depleted Dual Metal Gate SOI MOSFET

2019 ◽  
Vol 8 (10) ◽  
pp. 2946-2950
Keyword(s):  
Analytical Modeling ◽  
Cmos Technology ◽  
Step Function ◽  
Device Structure ◽  
Short Channel ◽  
Fully Depleted ◽  
Soi Mosfet ◽  
New Device ◽  
Dual Metal ◽  
Dual Material

The demand and development of scaled semiconductors devices for upcoming challenges in VLSI technology is unending. CMOS technology plays a very important role in fulfilling this criterion. The conventional MOSFET exhibits short channel effects (SCE) and performance degradation when scaled down in the nanometer regime. In order to meet the required enhanced performance and to further increase the device density new materials and new device structures have been developed. This paper analyses the performance characteristics of one of such improved device structure i.e Fully Depleted Silicon over Insulator (FDSOI) which also incorporate the gate having two metals of different work function specifically called Dual Material Gate (DMG) SOI MOSFET. The analytical modeling for this device structure has also been carried out. The simulation characteristics match closely with analytical results and as the surface potential profile of the device has step function in ensures that this device effectively reduces the SCE.

Gate-All-Around (GAA) Fully Depleted (FD) Cantilever Channel MOSFET with High-k Dielectric and Metal Gate

2007 ◽  
Vol 995 ◽  
Author(s):  
Sagnik Dey ◽  
Se-Hoon Lee ◽  
Sachin V. Joshi ◽  
Prashant Majhi ◽  
Sanjay K. Banerjee
Keyword(s):  
Metal Gate ◽  
Leakage Currents ◽  
Drive Current ◽  
Fully Depleted ◽  
Low Leakage ◽  
High Drive ◽  
High K ◽  
High K Dielectric

AbstractA MOSFET formed by a Si cantilever channel suspended between source/drain “anchors” wrapped all-around by high-κ dielectric and metal gate is demonstrated. The device shows excellent subthreshold characteristics and low leakage currents due to the fully depleted body and the gate-all-around architecture implemented with a high-κ dielectric and metal gate. At the same time this also allows a high drive current due to mobility enhancements arising from volume inversion of the cantilever channel such that a large ION/IOFF is achieved.

Modeling of Sub Threshold Current and Sub Threshold Swing of Short-Channel Fully-Depleted SOI MOSFET with Back-Gate Control

2017 ◽  
Vol 9 (01) ◽  
pp. 67-72
Author(s):  
Sarvesh Dubey ◽  
Rahul Mishra
Keyword(s):  
Analytical Modeling ◽  
Threshold Current ◽  
Short Channel Effects ◽  
Short Channel ◽  
Simulation Data ◽  
Back Gate ◽  
Fully Depleted ◽  
Soi Mosfet ◽  
Channel Effects ◽  
Gate Control

The present paper deals with the analytical modeling of subthreshold characteristics of short-channel fully-depleted recessed-source/drain SOI MOSFET with back-gate control. The variations in the subthreshold current and subthreshold swing have been analyzed against the back-gate bias voltage, buried-oxide (BOX) thickness and recessed source/drain thickness to assess the severity of short-channel effects in the device. The model results are validated by simulation data obtained from two-dimensional device simulator ATLAS from Silvaco.

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