Engineering Model Cryocooler Test Results

Wideband Inter-Networking engineering test and Demonstration Satellite Propulsion System and Engineering-Model Test Results

42nd AIAA/ASME/SAE/ASEE Joint Propulsion Conference & Exhibit ◽

10.2514/6.2006-4691 ◽

2006 ◽

Author(s):

Yoshihisa Arikawa ◽

Yasuo Nakamura ◽

Tsunehiko Araki ◽

Eiichi Tomita ◽

Tsuyoshi Maeda ◽

...

Keyword(s):

Model Test ◽

Propulsion System ◽

Test Results ◽

Engineering Model

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IN-ORBIT IMPLEMENTATION OF ERROR PATCHING METHODS FOR LAPAN-A3/IPB OBDH FIRMWARE SYSTEM

Jurnal Teknologi Dirgantara ◽

10.30536/j.jtd.2019.v17.a3012 ◽

2019 ◽

Vol 17 (1) ◽

pp. 11

Author(s):

Muhammad Taufik ◽

Wahyudi Hasbi ◽

Abdul Karim

Keyword(s):

Integrated System ◽

Data Handling ◽

Hardware In The Loop ◽

Test Results ◽

Engineering Model ◽

Internal Memory ◽

Two Systems ◽

Satellite Sensors

ABSTRACTOBDH (On-board data handling) is a satellite subsystem that receives, processes, decides and executes commands from and to satellites. OBDH is built on two systems namely hardware and software integrated system (firmware system). In terms of hardware, OBDH uses a processor with 32bit RISC architecture, 128/256 Kbyte internal memory and a firmware system that is built using primitive programming. This programming uses the super loop architecture program and interrupt to manage the system to function properly. Problems occur when an error occurs in one of the functions in the interrupt routine resulting in failure of interpretation of commands or data from satellite sensors. This paper describes the implementation of the error patching methods on the LAPAN-A3/IPB Satellite OBDH firmware system in order to keep the system working well. Initial verification through testing on the ground have been successfully performed using engineering model of OBDH and hardware in the loop simulators (HWIL) module. Based on the test results, implementation on satellite has also been successfully done.ABSTRAKOBDH (On-board data handling) merupakan salah satu subsistem satelit yang berfungsi menerima, mengolah, mengambil keputusan dan mengeksekusi perintah dari dan ke satelit. OBDH dibangun berdasarkan dua buah sistem yaitu sistem perangkat keras dan perangkat lunak yang terintegrasi (sistem firmware). Dari sisi perangkat keras, OBDH menggunakan prosesor dengan arsitektur 32bit RISC, 128/256 Kbyte memori internal, dan sistem firmware yang dibangun menggunakan pemrograman primitif. Pemrograman ini menggunakan arsitektur program super loop dan interrupt untuk mengelola sistem agar dapat berfungsi dengan baik. Permasalahan terjadi ketika terjadi kesalahan pada salah satu fungsi pada rutin interrupt sehingga mengakibatkan kegagalan interpretasi perintah atau data dari sensor satelit. Paper ini menjelaskan mengenai implementasi metode penambalan kesalahan pada sistem firmware OBDH satelit LAPAN-A3/IPB yang bertujuan untuk menjaga agar sistem tetap bekerja dengan baik. Verifikasi awal melalui pengujian telah berhasil dilakukan mengunakan engineering model OBDH dan modul hardware in the loop simulators (HWIL). Berdasarkan hasil pengujian, implementasi pada satelit juga telah sukses dilakukan.

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