A Novel Wafer-Level Double Side Packaging and Its Microwave Performance

2012 ◽  
Vol 2012 (1) ◽  
pp. 000040-000045
Author(s):  
Xiao Chen ◽  
Jiajie Tang ◽  
Gaowei Xu ◽  
Le Luo

In this paper, a wafer-level System-in-Packaging structure using through silicon via (TSV) for integration on both sides of the silicon wafer is presented. It is composed of BCB/ metal multilayers, high-resistivity silicon substrate with TSV. To reduce the transmission loss in microwave frequency, not only the high-resistivity silicon is used, but also a special TSV structure with 6 grounded shielding vias around the core via are adopted. Microstrip line (MSL) is used to transmit high-frequency signal on package plane together with the low permittivity intermediate dielectric polymer, BCB. Descriptions on the interconnection structure and the fabrication process are included. The microwave measurement result of the MSL connected by TSVs is measured up to 35GHz. The results of both the simulation and the measurement are presented.

Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1893
Author(s):  
Faxin Yu ◽  
Qi Zhou ◽  
Zhiyu Wang ◽  
Jiongjiong Mo ◽  
Hua Chen

In this paper, a three-dimensional heterogenous-integrated (3DHI) wafer-level packaging (WLP) process is proposed, and a radio frequency (RF) front-end module with two independent ultra-high frequency (UHF) receiving channels are designed and implemented, which covers 400 MHz–600 MHz and 2050 MHz–2200 MHz respectively for unmanned aerial vehicle (UAV) applications. The module is formed by wafer-to-wafer (W2W) bonding of two high-resistivity silicon (HR-Si) interposers with embedded bare dies and through silicon via (TSV) interconnections. Double-sided deep reactive ion etching (DRIE) and conformal electroplating process are introduced to realize the high-aspect-ratio TSV connection within 290 µm-thick cap interposer. Co-plane waveguide (CPW) transmission lines are fabricated as the process control monitor (PCM), the measured insertion loss of which is less than 0.18 dB/mm at 35 GHz. The designed RF front-end module is fabricated and measured. The measured return loss and gain of each RF channel is better than 13 dB and 21 dB, and the noise figure is less than 1.5 dB. In order to evaluate the capability of the 3DHI process for multi-layer interposers, the module is re-designed and fabricated with four stacked high-resistivity silicon interposers. After W2W bonding of two pairs of interposers and wafer slicing, chip-to chip (C2C) bonding is applied to form a four-layer module with operable temperature gradient.


1988 ◽  
Vol 49 (C4) ◽  
pp. C4-363-C4-366 ◽  
Author(s):  
V. RADEKA ◽  
P. REHAK ◽  
S. RESCIA ◽  
E. GATTI ◽  
A. LONGONI ◽  
...  

2010 ◽  
Vol 58 (3) ◽  
pp. 706-713 ◽  
Author(s):  
Woosung Lee ◽  
Jaeheung Kim ◽  
Choon Sik Cho ◽  
Young Joong Yoon

Author(s):  
L. Pancheri ◽  
D. Stoppa ◽  
N. Massari ◽  
M. Malfatti ◽  
C. Piemonte ◽  
...  

1988 ◽  
Vol 116 ◽  
Author(s):  
A. Georgakilas ◽  
M. Fatemi ◽  
L. Fotiadis ◽  
A. Christou

AbstractOne micron thick AlAs/GaAs structures have been deposited by molecular beam epitaxy onto high resistivity silicon substrates. Subsequent to deposition, it is shown that Excimer laser annealing up to 120mJ/cm2 at 248nm improves the GaAs mobility to approximately 2000cm2 /v-s. Dislocation density, however, did not decrease up to 180mJ/cm2 showing that improvement in transport properties may not be accompanied by an associated decrease in dislocation density at the GaAs/Si interface.


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