scholarly journals A SiC Double-Sided Stacked Wire-Bondless Power Module for High-Frequency Power Electronic Applications

2021 ◽  
Vol 18 (3) ◽  
pp. 113-122
Author(s):  
Si Huang ◽  
Zhong Chen

Abstract This article reports a double-sided stacked wire-bondless power module package for silicon carbide (SiC) power devices to achieve low parasitic inductance and improved thermal performance for high-frequency applications. The design, simulation, fabrication, and characterization of the power module are presented. A half-bridge module based on the SiC power MOSFETs is demonstrated with minimized parasitic inductance. Double-sided cooling paths are used to maximize heat dissipation. Besides conventional packaging materials used in the power module fabrication, a low-temperature cofired ceramic (LTCC) and nickel-plated copper balls are used in this module package. The LTCC acts as an interposer providing both electrical and thermal routings. The nickel-plated copper balls replace bond wires as the electrical interconnections for the SiC power devices. The electrical and thermo-mechanical simulations of the power module are performed, and its switching performance is evaluated experimentally.

2021 ◽  
Author(s):  
Hayden Carlton ◽  
John Harris ◽  
Alexis Krone ◽  
David Huitink ◽  
Md Maksudul Hossain ◽  
...  

Abstract The need for high power density electrical converters/inverters dominates the power electronics realm, and wide bandgap semiconducting materials, such as gallium nitride (GaN), provide the enhanced material properties necessary to drive at higher switching speeds than traditional silicon. However, lateral GaN devices introduce packaging difficulties, especially when attempting a double-sided cooled solution. Herein, we describe optimization efforts for a 650V/30A, GaN half-bridge power module with an integrated gate driver and double-sided cooling capability. Two direct bonded copper (DBC) substrates provided the primary means of heat removal from the module. In addition to the novel topology, the team performed electrical/thermal co-design to increase the multi-functionality of module. Since a central PCB comprised the main power loop, the size and geometry of the vias and copper traces was analyzed to determine optimal functionality in terms of parasitic inductance and thermal spreading. Thermally, thicker copper layers and additional vias introduced into the PCB also helped reduce hot spots within the module. Upon fabrication of the module, it underwent electrical characterization to determine switching performance, as well as thermal characterization to experimentally measure the total module’s thermal resistance. The team successfully operated the module at 400 V, 30 A with a power loop parasitic inductance of 0.89 nH; experimental thermal measurements also indicated the module thermal resistance to be 0.43 C/W. The overall utility of the design improved commensurately by introducing simple, yet effective electrical/thermal co-design strategies, which can be applied to future power modules.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Verdad C. Agulto ◽  
Toshiyuki Iwamoto ◽  
Hideaki Kitahara ◽  
Kazuhiro Toya ◽  
Valynn Katrine Mag-usara ◽  
...  

AbstractGallium nitride (GaN) is one of the most technologically important semiconductors and a fundamental component in many optoelectronic and power devices. Low-resistivity GaN wafers are in demand and actively being developed to improve the performance of vertical GaN power devices necessary for high-voltage and high-frequency applications. For the development of GaN devices, nondestructive characterization of electrical properties particularly for carrier densities in the order of 1019 cm−3 or higher is highly favorable. In this study, we investigated GaN single crystals with different carrier densities of up to 1020 cm−3 using THz time-domain ellipsometry in reflection configuration. The p- and s-polarized THz waves reflected off the GaN samples are measured and then corrected based on the analysis of multiple waveforms measured with a rotating analyzer. We show that performing such analysis leads to a ten times higher precision than by merely measuring the polarization components. As a result, the carrier density and mobility parameters can be unambiguously determined even at high conductivities.


2001 ◽  
Vol 682 ◽  
Author(s):  
Simon S. Wen ◽  
Daniel Huff ◽  
Guo-Quan Lu

ABSTRACTThis paper describes a wireless-bond interconnect technique, termed Dimple-Array Interconnect (DAI) technique for packaging power devices. Electrical connections onto the devices are established by soldering arrays of dimples pre-formed on a metal sheet. Preliminary experimental and analytical results demonstrated potential advantages of this technique such as reduced parasitic noises, improved heat dissipation, as well as lowered processing complexity, compared to the conventional wire bonding technology in power module manufacturing. Thermomechanical analysis using thermal cycling test and FEM were also performed to evaluate the reliability characteristics of this interconnect technique for power devices.


2016 ◽  
Vol 858 ◽  
pp. 1057-1060 ◽  
Author(s):  
Konstantin Kostov ◽  
Jang Kwon Lim ◽  
Ya Fan Zhang ◽  
Mietek Bakowski

The package parasitics are a serious obstacle to the high-speed switching, which is necessary in order to reduce the switching power losses or reduce the size of power converters. In order to design new packages suitable for Silicon Carbide (SiC) power transistors, it is necessary to extract the parasitics of different packages and be able to predict the switching performance of the power devices placed in these packages. This paper presents two ways of simulating the switching performance in a half-bridge power module with SiC MOSFETs. The results show that the parasitic inductances in the power module slow down the switching, lead to poor current sharing, and together with the parasitic capacitances lead to oscillations. These negative effects can cause failures, increased losses, and electromagnetic compatibility issues.


2018 ◽  
Vol 924 ◽  
pp. 883-886
Author(s):  
Ty McNutt ◽  
Kraig Olejniczak ◽  
Stephen Minden ◽  
Daniel Martin ◽  
Jonathan Hayes ◽  
...  

This paper extends a previously presented SiC power module design philosophy to critical, higher-level components for increased system performance, namely the DC bussing and DC link capacitor design. The DC bussing is essential to connect the DC bulk capacitors to the high-speed power modules and it is imperative that low inductance is maintained while current carrying capability and temperature be maintained. Often, high frequency capacitors are added to systems to increase performance by compensating for extra stray inductance that the DC bussing can introduce. However, issues that may arise by doing such are presented and it is shown that the best solution is to optimize the DC bus structure rather than compensate for a poor design. Finally, the implemented bussing is shown and full power system results presented for the inverter stack-up design.


2008 ◽  
Vol 600-603 ◽  
pp. 1139-1142 ◽  
Author(s):  
Ginger G. Walden ◽  
Ty McNutt ◽  
Marc Sherwin ◽  
Stephen Van Campen ◽  
Ranbir Singh ◽  
...  

For the first time, large area 10 kV SiC power devices are being produced capable of yielding power modules for high-frequency megawatt power conversion. To this end, the switching performance and power dissipation of silicon carbide (SiC) n-channel IGBTs and MOSFETs are evaluated using numerical simulations software over an extended current range to determine the best device suitable for 10 kV applications. Each device is also optimized for minimal forward voltage drop in the on-state.


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