3D Modular Power Electronic Packages and Modules for different power classes - from 50W to 50kW

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-34
Author(s):  
Lars Böttcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann
Keyword(s):  
Printed Circuit Board ◽  
High Reliability ◽  
Electrical Contacts ◽  
Circuit Board ◽  
Electrical Performance ◽  
Development Work ◽  
Power Electronic ◽  
Detailed Structural Analysis ◽  
Power Modules ◽  
Application Fields

This paper will describe the use of embedded die technologies for various application fields. The main focus of the paper will be the development work within the European funded project EmPower, which concentrates on power electronic applications. Here, three different power levels are of interest:50W single die packages with fast rectifier diodes500W power modules for electric bicycle application50kW power modules for HEV and EV application All three application fields are based on a similar concept. The so called power core provides the base for the package/module. This power core contains the embedded semiconductor(s) and is manufactured using printed circuit board processing on a large panel format of 18 by 24 inches. Electrical contacts to the embedded dies are made by laser drilled micro vias and copper filling. A major advantage of such a direct copper contact, compared to the conventionally used wire bond, is its high reliability and the improved electrical performance. By the reduction of the inductance of these interconnects, switching losses can be reduced significantly, allowing an improved and faster switching. For the higher power modules additionally thermal management is required. Here a construction of IMS substrates and the power core is chosen. This construction enables a double sided cooling and also the electrical isolation of the module to the cooler. The connection between power core and IMS substrates is made by low temperature and low pressure Ag sintering. All three applications fields will be described in detail. This will cover the development of the manufacturing process for all three power class demonstrators, as well as detailed structural analysis and reliability testing. The development work toward highly reliable modules will be discussed in depth. Finally the resulting demonstrators for 50W, 500W and 50kW power application and their characteristics will be presented in detail.

Realization of Power Modules by Chip Embedding Technology

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 001019-001045 ◽  
Author(s):  
Lars Boettcher ◽  
D. Manessis ◽  
S. Karaszkiewicz ◽  
A. Ostmann
Keyword(s):  
Printed Circuit Board ◽  
High Reliability ◽  
Computer Applications ◽  
Circuit Board ◽  
Manufacturing Cost ◽  
Chip Technology ◽  
Power Modules ◽  
Wide Range ◽  
Via Holes ◽  
Third Dimension

The continuous miniaturization of silicon dies and the need for a further package size reduction, with an equal or better performance and reduced manufacturing cost, are the main drivers for new packaging concepts. The embedding of active and passive components offers a wide range of benefits and potentials. With the use of laminate based technology concepts, components can be moved from surface mount into the build-up layers of substrates by embedding and by that, the third dimension will be available for further layers or assemblies. This paper will briefly discuss the necessary process steps of the embedded chip technology, which is based on printed circuit board manufacturing processes, and will also demonstrate the transfer of the technology from a smaller size lab scale equipment environment to an industrial comparable process line, capable of processing large panel formats up to 18” x 24”. The paper will also briefly describe this development and categorize today's embedding technologies. First modules with embedded chips are in production in Asia, mainly for telecom and computer applications. In Europe embedding has gained a strong interest for power modules, especially in automotive applications. Main drivers are the capability for compact and thin packaging, the high reliability and cost saving potential. In a number of European cooperation projects with partners from industry and research, embedding of power chips, like IGBTS and power MOSFET, is of high interest. In this paper current achievements of these projects will be shown, especially examples of realized devices and their characteristics. The dominating technology for power chip embedding is a face-up technology. Chips are bonded with their backside (drain contact) to a Cu substrate using highly conductive adhesive or solder. Using the face up assembly, a direct contact to the backside of the die is possible, allowing a lot of benefits for driving high currents and applying an efficient thermal management for the power devices. Then Chips are embedded by vacuum lamination of prepreg or RCC (resin coated copper) layers. Via holes to the top contacts (gate and source) are formed by laser drilling. The vias are metallized using conventional Cu plating. Finally conductor structures are etched in the top Cu layer, finalizing the circuit. Details will be given about device manufacturing, related yield issues and strategies to overcome them. Finally scenarios for the implementation of embedding technology and concepts for future applications will be discussed.

Microhardness Testing on Via Fill Material for Via In Pad Technology

2003 ◽  
Author(s):  
Norman J. Armendariz ◽  
Carolyn McCormick
Keyword(s):  
Printed Circuit Board ◽  
Failure Modes ◽  
Strong Dependence ◽  
Circuit Board ◽  
Electrical Performance ◽  
Gravimetric Analysis ◽  
Passive Components ◽  
Root Cause ◽  
Fill Material ◽  
Signal Routing

Abstract Via in pad PCB (Printed Circuit board) technology for passive components such as chip capacitors and resistors, provides the potential for improved signal routing density and reduced PCB area. Because of these improvements there is the potential for PCB cost reduction as well as gains in electrical performance through reduced impedance and inductance. However, not long after the implementation, double digit unit failures for solder joint electrical opens due to capacitor “tombstoning” began to occur. Failure modes included via fill material (solder mask) protrusion from the via as well as “out gassing” and related “tombstoning.” This failure analysis involved investigating a strong dependence on PCB supplier and, less obviously, manufacturing site. Other factors evaluated included via fill material, drill size, via fill thermal history and via fill amount or fill percent. The factor most implicated was incomplete cure of the via fill material. Previous thermal gravimetric analysis methods to determine level of polymerization or cure did not provide an ability to measure and demonstrate via fill cure level in small selected areas or its link to the failures. As a result, there was a metrology approach developed to establish this link and root-cause the failures in the field, which was based on microhardness techniques and noncontact via fill measuring metrologies.

scholarly journals Research on Small Square PCB Rogowski Coil Measuring Transient Current in the Power Electronics Devices

Sensors ◽  
2019 ◽  
Vol 19 (19) ◽  
pp. 4176 ◽  
Author(s):  
Chaoqun Jiao ◽  
Juan Zhang ◽  
Zhibin Zhao ◽  
Zuoming Zhang ◽  
Yuanliang Fan
Keyword(s):  
Power Electronics ◽  
Printed Circuit Board ◽  
Electronic Devices ◽  
Rogowski Coil ◽  
Bipolar Transistors ◽  
Circuit Board ◽  
Power Electronic ◽  
Insulated Gate Bipolar Transistors ◽  
Printed Circuit ◽  
Internal Structures

With the development of China’s electric power, power electronics devices such as insulated-gate bipolar transistors (IGBTs) have been widely used in the field of high voltages and large currents. However, the currents in these power electronic devices are transient. For example, the uneven currents and internal chip currents overshoot, which may occur when turning on and off, and could have a great impact on the device. In order to study the reliability of these power electronics devices, this paper proposes a miniature printed circuit board (PCB) Rogowski coil that measures the current of these power electronics devices without changing their internal structures, which provides a reference for the subsequent reliability of their designs.

A Novel Discrete Passives Integration on Organic Substrate

2005 ◽  
Author(s):  
Vasudivan Sunappan ◽  
Chee Wai Lu ◽  
Lai Lai Wai ◽  
Wei Fan ◽  
Boon Keng Lok
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Organic Substrate ◽  
Temperature Cycling ◽  
Circuit Board ◽  
Electrical Performance ◽  
Core Material ◽  
Bottom Surface ◽  
Passive Components ◽  
Printed Circuit

A novel process has been developed to embed discrete (surface mountable) passive components like capacitors, resistors and inductors using printed circuit board fabrication technology. The process comprises of mounting passive components on top surface of a core PCB (printed circuit board) material using surface mount technology. The passive components mounting were designed in multiple clusters within the PCB. Dielectric sheets are sandwiched between top surface of core PCB and second PCB material for lamination process. A direct interconnection of the passive components to one or more integrated circuits (IC) is further accomplished by mounting the ICs on the bottom surface of the core material in an area directly under the passive components. The close proximity of the embedded passive components such as capacitors to an IC improved electrical performance by providing impedance reduction and resonance suppression at high frequency range. The reliability of solder joints was evaluatedd by temperature cycling test.

An Experimental Assessment of Numerical Predictive Accuracy for Electronic Component Heat Transfer in Forced Convection—Part II: Results and Discussion

2003 ◽  
Vol 125 (1) ◽  
pp. 76-83 ◽  
Author(s):  
Peter J. Rodgers ◽  
Vale´rie C. Eveloy ◽  
Mark R. Davies
Keyword(s):  
Heat Transfer ◽  
Forced Convection ◽  
Printed Circuit Board ◽  
Predictive Accuracy ◽  
Numerical Models ◽  
Circuit Board ◽  
Junction Temperature ◽  
Electrical Performance ◽  
Test Cases ◽  
Computational Fluid Dynamics Cfd

Numerical predictive accuracy is assessed for component-printed circuit board (PCB) heat transfer in forced convection using a widely used computational fluid dynamics (CFD) software. In Part I of this paper, the benchmark test cases, experimental methods and numerical models were described. Component junction temperature prediction accuracy for the populated board case is typically within ±5°C or ±10%, which would not be sufficient for temperature predictions to be used as boundary conditions for subsequent reliability and electrical performance analyses. Neither the laminar or turbulent flow model resolve the complete flow field, suggesting the need for a turbulence model capable of modeling transition. The full complexity of component thermal interaction is shown not to be fully captured.

Damage and Failures of CGA/BGA Assemblies Under Thermal Cycling and Dynamic Loadings

2013 ◽  
Author(s):  
Reza Ghaffarian
Keyword(s):  
Thermal Cycling ◽  
Mechanical Loading ◽  
Test Data ◽  
Printed Circuit Board ◽  
High Reliability ◽  
Circuit Board ◽  
Design Parameters ◽  
Mechanical Shock ◽  
Space Applications ◽  
High Processing

Commercial-off-the-shelf column/ball grid array packaging (COTS CGA/BGA) technologies in high-reliability versions are now being considered for use in high-reliability electronic systems. For space applications, these packages are prone to early failure due to the severe thermal cycling in ground testing and during flight, mechanical shock and vibration of launch, as well as other less severe conditions, such as mechanical loading during descent, rough terrain mobility, handling, and ground tests. As the density of these packages increases and the size of solder interconnections decreases, susceptibility to thermal, mechanical loading and cycling fatigue grows even more. This paper reviews technology as well as thermo-mechanical reliability of field programmable gate array (FPGA) IC packaging developed to meet demands of high processing powers. The FPGAs that generally come in CGA/PBGA packages now have more than thousands of solder balls/columns under the package area. These packages need not only to be correctly joined onto printed circuit board (PCB) for interfacing; they also should show adequate system reliability for meeting thermo-mechanical requirements of the electronics hardware application. Such reliability test data are rare or none for harsher environmental applications, especially for CGAs having more than a thousand of columns. The paper also presents significant test data gathered under thermal cycling and drop testing for high I/O PBGA/CGA packages assembled onto PCBs. Damage and failures of these assemblies after environmental exposures are presented in detail. Understanding the key design parameters and failure mechanisms under thermal and mechanical conditions is critical to developing an approach that will minimize future failures and will enable low-risk insertion of these advanced electronic packages with high processing power and in-field re-programming capability.

Experimental and Numerical Investigation of the Reliability of Double-Sided Area Array Assemblies

2006 ◽  
Vol 128 (4) ◽  
pp. 441-448 ◽  
Author(s):  
S. Chaparala ◽  
J. M. Pitarresi ◽  
S. Parupalli ◽  
S. Mandepudi ◽  
M. Meilunas
Keyword(s):  
Thermal Cycling ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Mirror Image ◽  
Circuit Board ◽  
Thermal Dissipation ◽  
Electrical Performance ◽  
Area Array ◽  
Plastic Ball

One of the primary advantages of surface mount technology (SMT) over through-hole technology is that SMT allows the assembly of components on both sides of the printed circuit board (PCB). Currently, area array components such as ball grid array (BGA) and chip-scale package (CSP) assemblies are being used in double-sided configurations for network and memory device applications as they reduce the routing space and improve electrical performance (Shiah, A. C., and Zhou, X., 2002, “A Low Cost Reliability Assessment for Double-Sided Mirror-Imaged Flip Chip BGA Assemblies,” Proceedings of the Seventh Annual Pan Pacific Microelectronics Symposium, Maui, Hawaii, pp. 7–15, and Xie, D., and Yi, S., 2001, “Reliability Design and Experimental work for Mirror Image CSP Assembly”, Proceedings of the International Symposium on Microelectronics, Baltimore, October, pp. 417–422). These assemblies typically use a “mirror image” configuration wherein the components are placed on either side of the PCB directly over each other; however, other configurations are possible. Double-sided assemblies pose challenges for thermal dissipation, inspection, rework, and thermal cycling reliability. The scope of this paper is the study of the reliability of double-sided assemblies both experimentally and through numerical simulation. The assemblies studied include single-sided, mirror-imaged, 50% offset CSP assemblies, CSPs with capacitors on the backside, single-sided, mirror-imaged plastic ball grid arrays (PBGAs), quad flat pack (QFP)/BGA mixed assemblies. The effect of assembly stiffness on thermal cycling reliability was investigated. To assess the assembly flexural stiffness and its effect on the thermal cycling reliability, a three-point bending measurement was performed. Accelerated thermal cycling cycles to failure were documented for all assemblies and the data were used to calculate the characteristic life. In general, a 2X to 3X decrease in reliability was observed for mirror-image assemblies when compared to single-sided assemblies for both BGAs and CSPs on 62mil test boards. The reliability of mirror-image assemblies when one component was an area array device and the other was a QFP was comparable to the reliability of the single-sided area array assemblies alone, that is, the QFP had almost no influence on the double-sided reliability when used with an area array component. Moiré interferometry was used to study the displacement distribution in the solder joints at specific locations in the packages. Data from the reliability and moiré measurements were correlated with predictions generated from three-dimensional finite element models of the assemblies. The models incorporated nonlinear and time-temperature dependent solder material properties and they were used to estimate the fatigue life of the solder joints and to obtain an estimate of the overall package reliability using Darveaux’s crack propagation method.

Advanced Materials for Printed Circuit Boards

1987 ◽  
Vol 108 ◽  
Author(s):  
David Wei Wang
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
High Reliability ◽  
Circuit Board ◽  
Advanced Materials ◽  
Impregnation Method ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Worldwide Production ◽  
Board Industry

The printed circuit board is an integral part of the electronic packaging hierarchy. Its use began more than 40 years ago, and the demand for printed circuit boards has increased in parallel with the growth of the electronics industry.[1] According to a recent forecast, the worldwide production of printed circuit boards will reach to over 19 billion U.S. dollars' worth by 1990.[2] With continuing demands for more interconnections, the multilayer circuit board industry is experiencing its fastest growth rate. Boards with more than 20 inner planes of circuitry are being manufactured with high reliability.Based on dollar values, more than 90% of the circuit boards produced are in the rigid board category, where starting materials are based on thermosetting prepregs produced by a solution impregnation method. This article is a review of materials currently used in rigid composites.

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