Realization of Power Modules by Chip Embedding Technology

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 001019-001045 ◽  
Author(s):  
Lars Boettcher ◽  
D. Manessis ◽  
S. Karaszkiewicz ◽  
A. Ostmann
Keyword(s):  
Printed Circuit Board ◽  
High Reliability ◽  
Computer Applications ◽  
Circuit Board ◽  
Manufacturing Cost ◽  
Chip Technology ◽  
Power Modules ◽  
Wide Range ◽  
Via Holes ◽  
Third Dimension

The continuous miniaturization of silicon dies and the need for a further package size reduction, with an equal or better performance and reduced manufacturing cost, are the main drivers for new packaging concepts. The embedding of active and passive components offers a wide range of benefits and potentials. With the use of laminate based technology concepts, components can be moved from surface mount into the build-up layers of substrates by embedding and by that, the third dimension will be available for further layers or assemblies. This paper will briefly discuss the necessary process steps of the embedded chip technology, which is based on printed circuit board manufacturing processes, and will also demonstrate the transfer of the technology from a smaller size lab scale equipment environment to an industrial comparable process line, capable of processing large panel formats up to 18” x 24”. The paper will also briefly describe this development and categorize today's embedding technologies. First modules with embedded chips are in production in Asia, mainly for telecom and computer applications. In Europe embedding has gained a strong interest for power modules, especially in automotive applications. Main drivers are the capability for compact and thin packaging, the high reliability and cost saving potential. In a number of European cooperation projects with partners from industry and research, embedding of power chips, like IGBTS and power MOSFET, is of high interest. In this paper current achievements of these projects will be shown, especially examples of realized devices and their characteristics. The dominating technology for power chip embedding is a face-up technology. Chips are bonded with their backside (drain contact) to a Cu substrate using highly conductive adhesive or solder. Using the face up assembly, a direct contact to the backside of the die is possible, allowing a lot of benefits for driving high currents and applying an efficient thermal management for the power devices. Then Chips are embedded by vacuum lamination of prepreg or RCC (resin coated copper) layers. Via holes to the top contacts (gate and source) are formed by laser drilling. The vias are metallized using conventional Cu plating. Finally conductor structures are etched in the top Cu layer, finalizing the circuit. Details will be given about device manufacturing, related yield issues and strategies to overcome them. Finally scenarios for the implementation of embedding technology and concepts for future applications will be discussed.

3D Modular Power Electronic Packages and Modules for different power classes - from 50W to 50kW

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-34
Author(s):  
Lars Böttcher ◽  
S. Karaszkiewicz ◽  
D. Manessis ◽  
A. Ostmann
Keyword(s):  
Printed Circuit Board ◽  
High Reliability ◽  
Electrical Contacts ◽  
Circuit Board ◽  
Electrical Performance ◽  
Development Work ◽  
Power Electronic ◽  
Detailed Structural Analysis ◽  
Power Modules ◽  
Application Fields

This paper will describe the use of embedded die technologies for various application fields. The main focus of the paper will be the development work within the European funded project EmPower, which concentrates on power electronic applications. Here, three different power levels are of interest:50W single die packages with fast rectifier diodes500W power modules for electric bicycle application50kW power modules for HEV and EV application All three application fields are based on a similar concept. The so called power core provides the base for the package/module. This power core contains the embedded semiconductor(s) and is manufactured using printed circuit board processing on a large panel format of 18 by 24 inches. Electrical contacts to the embedded dies are made by laser drilled micro vias and copper filling. A major advantage of such a direct copper contact, compared to the conventionally used wire bond, is its high reliability and the improved electrical performance. By the reduction of the inductance of these interconnects, switching losses can be reduced significantly, allowing an improved and faster switching. For the higher power modules additionally thermal management is required. Here a construction of IMS substrates and the power core is chosen. This construction enables a double sided cooling and also the electrical isolation of the module to the cooler. The connection between power core and IMS substrates is made by low temperature and low pressure Ag sintering. All three applications fields will be described in detail. This will cover the development of the manufacturing process for all three power class demonstrators, as well as detailed structural analysis and reliability testing. The development work toward highly reliable modules will be discussed in depth. Finally the resulting demonstrators for 50W, 500W and 50kW power application and their characteristics will be presented in detail.

A high-power PCCM LED driver based on GaN eHEMT with hybrid dimming modes

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Xixian Lin ◽  
Yuming Zhang ◽  
Yimeng Zhang ◽  
Guangjian Rong
Keyword(s):  
Printed Circuit Board ◽  
Pulse Width Modulation ◽  
Circuit Board ◽  
Switching Frequency ◽  
Led Driver ◽  
Power Circuit ◽  
Content Type ◽  
Wide Range ◽  
Circuit Function ◽  
Pwm Dimming

Purpose The purpose of this study is to design a more flexible and larger range of the dimming circuit that achieves the independence of multiple LED strings drive and can time-multiplex the power circuit. Design/methodology/approach The state-space method is used to model the BUCK circuit working in Pseudo continuous conduction mode, analyze the frequency characteristics of the system transfer function and design the compensation network. Build a simulation platform on the Orcad PSPICE platform and verify the function of the designed circuit through the simulation results. Use Altium Designer 16 to draw the printed circuit board, complete the welding of various components and use the oscilloscope, direct current (DC) power supply and a signal generator to verify the circuit function. Findings A prototype of the proposed LED driver is fabricated and tested. The measurement results show that the switching frequency can be increased to 1 MHz, Power inductance is 2.2 µH, which is smaller than current research. The dimming ratio can be set from 10% to 100%. The proposed LED driver can output more than 48 W and achieve a peak conversion efficiency of 91%. Originality/value The proposed LED driver adopts pulse width modulation (PWM) dimming at a lower dimming ratio and adopts DC dimming at a larger dimming ratio to realize switching PWM dimming to analog dimming. The control strategy can be more precise and have a wide range of dimming.

Next Generation System in a Package Manufacturing by Embedded Chip Technologies

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 002075-002103
Author(s):  
Lars Boettcher ◽  
A. Ostmann ◽  
D. Manessis ◽  
S. Karaszkiewicz ◽  
H. Reichl
Keyword(s):  
Glass Fibers ◽  
Copper Substrate ◽  
Standard Type ◽  
Chip Technology ◽  
Fine Pitch ◽  
Wide Range ◽  
Power Part ◽  
Third Dimension ◽  
New Generation ◽  
Embedded Chip

The embedding of active and passive components offers a wide range of benefits and potentials. With the use of laminate based technology concepts, components can be moved from surface mount into the build-up layers of substrates by embedding and by that, the third dimension will be available for further layers or assemblies. This paper will briefly discuss the necessary process steps of the embedded chip technology and more importantly it will focus on new efforts to actually use chip embedding concepts for the realization of standard-type industrial Quad Flat Packages with embedded chips (embedded chip QFN). Chips of 50 μm thickness, a pad pitch of 100 μm and pad size of 85 μm are die bonded to a copper substrate and subsequently embedded in RCC (Resin-Coated-Copper) layers by using vacuum lamination. The resulting QFN packages are only 160 μm thick and provide standard pads at 400 μm pitch and a total number of 84 I/Os with dimensions of 10x10 mm2. All embedded chip QFN packages at prototype level are manufactured in 250x300 mm2 panels. The present work will include QFN package reliability results after extensive testing of thermal cycling, temperature humidity, high temperature storage and pressure cooker test. The investigation of new embedding material combinations is one task to provide a reliable package. The main focus here is on new materials that offer improved package stability and also the ability to embed dies of different thickness. Together with material suppliers improved resin formulations as well as the introduction of filler and glass fibers into the resin layers is currently realized and tested. In order to realize a further miniaturization ultra fine pitch (UFP) and fine line (UFL) approaches will be presented. For a UFP approach the goal is to develop the laser via technology further towards their limits as well as the investigation of new concepts. UFP requires the use of a semi additive patterning process. Here LDI processing is being used for all new generation chip embedded packages due to its potential for very fine copper patterning. Results on very fine L/S of 15–20μm will be shown based on the semi-additive processes on an ultra thin initial 1–2μm copper foil. Finally different applications will be presented. In an industrial cooperation different power package developments are ongoing. Here single and multi chips modules are realized as well as multiple routing layers. The combination of power and logic is one of the main challenges here, due to the need of thick copper layers for the power part and the more fine pitch demands for the controller chips. Process developments and results will be discussed in detail.

Pretreatment of Blind Via Holes before Ni/Au and Cu Plating Applied with Atmospheric Pressure Plasma Jet

2005 ◽  
Vol 2 (3) ◽  
pp. 189-196 ◽  
Author(s):  
Yasushi Sawada ◽  
Keiichi Yamazaki ◽  
Noriyuki Taguchi ◽  
Tetsuji Shibata
Keyword(s):  
Atmospheric Pressure ◽  
Printed Circuit Board ◽  
Formation Rate ◽  
Plasma Processing ◽  
Atmospheric Pressure Plasma ◽  
Plasma Jet ◽  
Circuit Board ◽  
Bottom Surface ◽  
Printed Circuit ◽  
Via Holes

The effectiveness of atmospheric pressure (AP) plasma preprocessing before Ni/Au or Cu plating has been examined by applying it to a build-up printed circuit board (FR-4 grade) and polyimide-based flexible circuit film, both with blind via-holes (BVHs). The AP plasma applied with a dielectric barrier discharge is generated inside a 56 mm wide quartz vessel by an RF power generator using Ar-O2 gas mixture. One side of the vessel is open and the plasma jet is blown on the sample substrate transported 5 mm downward from the outlet of the vessel. The deposit failure rate of Ni/Au electroless deposit to 50 μm-diameter BVHs formed on a photo resist on the printed circuit board is 12.5% without preprocessing but is decreased to 0% after applying the AP plasma processing. As for 50 μm-diameter BVHs formed with a YAG laser on a polyimide-based flexible circuit film, the bump formation using electrolytic copper plating fails without preprocessing, but a 100% bump formation rate is achieved after applying AP plasma processing. It is presumed that the AP plasma processing improves the wetting property of the BVH walls and allows the plating solution to uniformly cover the entire wall surfaces without generating bubbles. The removal of organic substances attached to the BVH bottom surface also helps to improve the adherence of metal plating.

A Study on the Characteristics of a Vibrator Using Flat PCB-Coil

2013 ◽  
Vol 392 ◽  
pp. 738-742 ◽  
Author(s):  
Hyung Sik Kim ◽  
Sang Pyo Hong ◽  
Mi Hyun Choi ◽  
Hyun Joo Kim ◽  
In Hwa Lee ◽  
...  
Keyword(s):  
Vibration Amplitude ◽  
Printed Circuit Board ◽  
Cooling System ◽  
Sine Wave ◽  
Circuit Board ◽  
Frequency Change ◽  
Tactile Stimulator ◽  
Custom Made ◽  
Wide Range ◽  
Fiberglass Cloth

In this study, we developed and evaluateda vibrator using a flat PCB-coil. The flat PCB-coil vibrator was fabricated on a printed circuit board using and etching process. The spiral pattern was etched on a fiberglass cloth with an epoxy resin. To evaluatethe flat PCB-coil vibrator, we generated a sine wave, saw-tooth, and square wave through a custom made wave generator and amplified the waveforms using a power amplifier. A three-axis accelerometer was used to evaluate the performance of the developed vibrator. Even though the developed vibrator is simple, it has a wide range of vibration frequency (50~500 Hz) and vibration amplitude (0~5 V). The vibration amplitude does not change due to frequency change. It is expected that the developed vibrator can be used in a wide variety of applications such as in a tactile stimulator, in elastography, energy harvesting, and in a cooling system.

Damage and Failures of CGA/BGA Assemblies Under Thermal Cycling and Dynamic Loadings

2013 ◽  
Author(s):  
Reza Ghaffarian
Keyword(s):  
Thermal Cycling ◽  
Mechanical Loading ◽  
Test Data ◽  
Printed Circuit Board ◽  
High Reliability ◽  
Circuit Board ◽  
Design Parameters ◽  
Mechanical Shock ◽  
Space Applications ◽  
High Processing

Commercial-off-the-shelf column/ball grid array packaging (COTS CGA/BGA) technologies in high-reliability versions are now being considered for use in high-reliability electronic systems. For space applications, these packages are prone to early failure due to the severe thermal cycling in ground testing and during flight, mechanical shock and vibration of launch, as well as other less severe conditions, such as mechanical loading during descent, rough terrain mobility, handling, and ground tests. As the density of these packages increases and the size of solder interconnections decreases, susceptibility to thermal, mechanical loading and cycling fatigue grows even more. This paper reviews technology as well as thermo-mechanical reliability of field programmable gate array (FPGA) IC packaging developed to meet demands of high processing powers. The FPGAs that generally come in CGA/PBGA packages now have more than thousands of solder balls/columns under the package area. These packages need not only to be correctly joined onto printed circuit board (PCB) for interfacing; they also should show adequate system reliability for meeting thermo-mechanical requirements of the electronics hardware application. Such reliability test data are rare or none for harsher environmental applications, especially for CGAs having more than a thousand of columns. The paper also presents significant test data gathered under thermal cycling and drop testing for high I/O PBGA/CGA packages assembled onto PCBs. Damage and failures of these assemblies after environmental exposures are presented in detail. Understanding the key design parameters and failure mechanisms under thermal and mechanical conditions is critical to developing an approach that will minimize future failures and will enable low-risk insertion of these advanced electronic packages with high processing power and in-field re-programming capability.

CPW triple-fed ultra-wideband antenna with variable band-notch function

2014 ◽  
Vol 7 (6) ◽  
pp. 791-796 ◽  
Author(s):  
M. Naser-Moghadasi ◽  
L. Asadpor
Keyword(s):  
Printed Circuit Board ◽  
Ground Plane ◽  
Ultra Wideband ◽  
Circuit Board ◽  
Manufacturing Cost ◽  
Radiation Patterns ◽  
Desirable Feature ◽  
Planar Wave ◽  
Matched Impedance ◽  
Uwb Applications

A small and compact ultra-wideband (UWB) aperture antenna with extended band-notched design is proposed. The antenna is composed of a rectangular aperture on ground plane of a printed circuit board and a fork-like exciting stub. The presented co-planar wave guide triple-fed antenna is easy to be applied with RF and microwave circuitry for low manufacturing cost. The antenna is successfully designed, implemented, and measured. A compact aperture area of 12.5 × 23 mm2 is acquired with promising performances, including broadband matched impedance and stable radiation patterns. The correlation between the mode-based field distributions and radiation patterns is discussed. Extended from the proposed antenna, one advanced band-notched (5–6 GHz) designs are also presented as a desirable feature for UWB applications.

Advanced Materials for Printed Circuit Boards

1987 ◽  
Vol 108 ◽  
Author(s):  
David Wei Wang
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
High Reliability ◽  
Circuit Board ◽  
Advanced Materials ◽  
Impregnation Method ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Worldwide Production ◽  
Board Industry

The printed circuit board is an integral part of the electronic packaging hierarchy. Its use began more than 40 years ago, and the demand for printed circuit boards has increased in parallel with the growth of the electronics industry.[1] According to a recent forecast, the worldwide production of printed circuit boards will reach to over 19 billion U.S. dollars' worth by 1990.[2] With continuing demands for more interconnections, the multilayer circuit board industry is experiencing its fastest growth rate. Boards with more than 20 inner planes of circuitry are being manufactured with high reliability.Based on dollar values, more than 90% of the circuit boards produced are in the rigid board category, where starting materials are based on thermosetting prepregs produced by a solution impregnation method. This article is a review of materials currently used in rigid composites.

Performance Comparison Between Surface-mount and Embedded Power Modules

2019 ◽  
Vol 2019 (DPC) ◽  
pp. 000647-000670
Author(s):  
Gerald Weis
Keyword(s):  
Printed Circuit Board ◽  
State Of The Art ◽  
Circuit Board ◽  
Switching Frequency ◽  
Surface Mount ◽  
Printed Circuit ◽  
Power Transistors ◽  
Wide Range ◽  
Power Switches ◽  
Embedded Power

Increasing efficiency in power electronic circuits requires innovative cooling concepts and a low impedance connection in the power path as well as low inductance driving circuits placed as close as possible to the main power switches. A direct comparison between state-of-the-art standard surface-mount build-ups and power switches embedded directly into the printed circuit board shows the high potential of integrated electronics. Measurements at defined operating point(s) verify improved thermal performance due to more heat spreading area, as well as higher achievable switching speed. For performance benchmarking two similar versions of half bridge circuits in DC-DC buck configuration were built to be compared in measurement. The first configuration uses standard, state-of-the-art SMD packages assembled onto the module. For the second half bridge module an embedded power path was used: The power transistors (GaN HEMT devices) are mounted inside the printed circuit board (PCB) and galvanically isolated from the heat sink pad on top of the package. Both versions use exactly the same schematic, layer stack-up and copper structure on the six layers used. A slightly different laser drill configuration was necessary because embedded parts are connected by copper filled laser drill holes. This measure was taken to optimize the modules according to their technology. Each module has an NTC thermistor mounted at the same distance to the half bridge transistors, and is used to indicate the temperature of the transistor dies during measurement. To cover a wide range of operational conditions the devices under test (DUTs) were stressed under hard switching operation (HSW) as well as triangular current mode (TCM). HSW causes more stress because the opposite transistor is switched before the whole energy of Coss has been discharged. In TCM the current through the inductor is becoming negative for a short time period and discharges the Coss capacitors of the power transistors. The test conditions were set as follows: 150V, 11A with 200kHz switching frequency in HSW mode. The switching behavior is similar, because both modules uses the same power transistors. Due to less parasitic impedance at the embedded module the turn-on behavior is slightly improved at the embedded module. Embedding as a new, innovative concept is compared to standard technologies. First measurements show that the embedded DUT stays 20K below the temperature of the standard module while running at the same load current. Additionally fewer disturbances were observed at the embedded module.

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