Dielectric Laser Via Drilling for Next Generation Wafer Level Processing

2014 ◽  
Vol 2014 (DPC) ◽  
pp. 000863-000885
Author(s):  
Jim Zaccardi ◽  
Guy Burgess ◽  
Theodore Tessier ◽  
Ken Lafenhagen ◽  
Matt Souter
Keyword(s):  
State Of The Art ◽  
Dielectric Materials ◽  
Formation Processes ◽  
Next Generation ◽  
Wafer Level ◽  
Ablation Process ◽  
Design Rules ◽  
Laser Ablation Process ◽  
The Common ◽  
Feature Resolution

The common via formation processes used today for dielectrics in WLCSP RDL and flipchip products typically rely on standard photolithography processing using stepper and 1x aligner equipment and processes. There is considerable interest in using laser via drilling (ablation) in dielectrics for flipchip, RDL inner layer, and WLCSP processing for reduced via dimensions and enabling a broader range of dielectric materials, including inherently non-photosensitive options. This presentation will demonstrate “state of the art” laser ablation process results, through different dielectrics showing improved feature resolution and reduced via opening sizes resulting in significantly improved interconnect density. Laser via drilling is a more simplified process compared to traditional photolithography methods. This presentation will demonstrate how using laser via drilling could dramatically improve the design rules for next generation RDL designs.

Low Temperature Curing - Aqueous Base Developable Photoimageable Dielectric for WLP (Wafer Level Packaging)

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 000986-001015
Author(s):  
Eric Huenger ◽  
Joe Lachowski ◽  
Greg Prokopowicz ◽  
Ray Thibault ◽  
Michael Gallagher ◽  
...  
Keyword(s):  
Low Temperature ◽  
Dielectric Material ◽  
Broad Band ◽  
Dielectric Materials ◽  
Next Generation ◽  
Wafer Level ◽  
Moore’S Law ◽  
Moore's Law ◽  
3D Chip Stacking ◽  
The Impact

As advanced packaging application space evolves and continues to deviate from the conventional shrinkage pathway predicted by Moore's law, material suppliers need to continue to work with OEMs, OSATs and Foundries to identify specific opportunities. One such opportunity continues to present itself in developing new materials to support new platforms for next generation products to support 3D chip stacking and TSV applications. The newer material sets can be established to meet more challenging design requirements associated with the demands, presented by the application from both a physical/lithographical processing and design perspective. Next generation packages requires the development of new dielectric materials that can support both the physical demands of 3D chip stacking and TSV package design aspects while maintaining strengths of the existing material platform. While vertical integration necessitates the use of thinned substrates and its associated integration challenges, there is a continuing need to support horizontal shrinkage typical of the Moore's Law, which pushes the lithography envelope requiring finer pitch and smaller feature resolution capability. This presentation identifies the strategy we have taken and highlights approach taking in the development of low temperature curable photoimageable dielectric materials with enhanced lithographic performance. We will discuss the methodology used to create benzocyclobutene based dielectric material curable at 180 °C and show how lithographic performance can be tuned to allow sub 5 micron via using broad band illumination. Finally we will review the impact of low temperature processing on the mechanical, thermal and electrical properties of this novel photoimageable dielectric material.

Low Temperature Curable PI/PBO for Advanced Packaging

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-15 ◽  
Author(s):  
Daisaku Matsukawa ◽  
Tadamitsu Nakamura ◽  
Tetsuya Enomoto ◽  
Noriyuki Yamazaki ◽  
Masayuki Ohe ◽  
...  
Keyword(s):  
Low Temperature ◽  
Chemical Resistance ◽  
High Reliability ◽  
Dielectric Materials ◽  
The Novel ◽  
Next Generation ◽  
Wafer Level ◽  
High Chemical ◽  
High Chemical Resistance ◽  
Advanced Packaging

Photo-definable polyimides (PI) and polybenzoxazoles (PBO) have been widely used as dielectrics for re-distribution layers in wafer level chip size packages (WL-CSP). These materials can simplify the manufacturing process and ensure high reliability owing to their good mechanical properties and high thermal stability. For next generation electronic components fabricated by utilizing advanced packaging technologies such as 3D-stacking using TSV, package-on-package, fan-out WL-CSP etc., the most important requirements for dielectric materials are high lithographic performance, high adhesion to Cu RDL, high chemical resistance and low temperature curability. In this paper, we will report on our novel low temperature (<200C) curable PBO and PI. A novel alkaline positive tone PBO was developed by re-designing key components of the formulation to enhance lithographic performance, Cu adhesion and chemical resistance. It was found that the new PBO material showed higher lithographic performance than conventional PBOs due to its high dissolution contrast and which resulted in a resolution of 2micron (L/S) with a 7μm cured thickness and 3micron (L/S) with a 15micron cured thickness, respectively. This material also produced strong Cu adhesion and high chemical resistance at curing temperatures <200C with no delamination from the Cu RDL being observed after a 168hr Pressure Cooker Test (PCT). Furthermore, the new formulation showed high TCT resistance due to its high elongation below 0C. In addition, a novel solvent negative tone PI was also developed by incorporating a cross-linker to accelerate low temperature curability as well a photo-initiator to improve lithographic properties. As a result, the novel PI when cured at 175C for 1hr showed high Cu adhesion after 168hr PCT as well as high film properties. The new PI also showed excellent lithographic properties with a resolution of 6micron (L/S). Furthermore, the low temperature curable PI and PBO materials were used as dielectrics to fabricate WL-CSPs for both chip and board level reliability testing. The test results indicated that both the novel PBO and PI showed excellent reliability after thermal cycling (TCT) due to the significant improvements made to Cu adhesion and chemical resistance. These materials are expected to be promising for next generation WLP applications. Details are described in the presentation.

Caged-electron States and Split-electron States in Endohedral Alkali C60

2021 ◽  
Author(s):  
yifan yang ◽  
Lorenz S Cederbaum
Keyword(s):  
State Of The Art ◽  
Electronic States ◽  
Electron States ◽  
The Common ◽  
High Level

The low-lying electronic states of neutral X@C60(X=Li, Na, K, Rb) have been computed and analyzed by employing state-of-the-art high level many-electron methods. Apart from the common charge-separated states, well known...

Comparison of the laser ablation process on Zn and Ti using pulsed digital holographic interferometry

2010 ◽  
Vol 256 (14) ◽  
pp. 4633-4641 ◽  
Author(s):  
E. Amer ◽  
P. Gren ◽  
A.F.H. Kaplan ◽  
M. Sjödahl ◽  
M. El Shaer
Keyword(s):  
Laser Ablation ◽  
Holographic Interferometry ◽  
Ablation Process ◽  
Laser Ablation Process
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