scholarly journals A look underneath the SiO2/4H-SiC interface after N2O thermal treatments

2013 ◽  
Vol 4 ◽  
pp. 249-254 ◽  
Author(s):  
Patrick Fiorenza ◽  
Filippo Giannazzo ◽  
Lukas K Swanson ◽  
Alessia Frazzetto ◽  
Simona Lorenti ◽  
...  

The electrical compensation effect of the nitrogen incorporation at the SiO2/4H-SiC (p-type) interface after thermal treatments in ambient N2O is investigated employing both scanning spreading resistance microscopy (SSRM) and scanning capacitance microscopy (SCM). SSRM measurements on p-type 4H-SiC areas selectively exposed to N2O at 1150 °C showed an increased resistance compared to the unexposed ones; this indicates the incorporation of electrically active nitrogen-related donors, which compensate the p-type doping in the SiC surface region. Cross-sectional SCM measurements on SiO2/4H-SiC metal/oxide/semiconductor (MOS) devices highlighted different active carrier concentration profiles in the first 10 nm underneath the insulator–substrate interface depending on the SiO2/4H-SiC roughness. The electrically active incorporated nitrogen produces both a compensation of the acceptors in the substrate and a reduction of the interface state density (D it). This result can be correlated with the 4H-SiC surface configuration. In particular, lower D it values were obtained for a SiO2/SiC interface on faceted SiC than on planar SiC. These effects were explained in terms of the different surface configuration in faceted SiC that enables the simultaneous exposition at the interface of atomic planes with different orientations.

1994 ◽  
Vol 339 ◽  
Author(s):  
R. Turan ◽  
Q. Wahab ◽  
L. Hultman ◽  
M. Willander ◽  
J. -E. Sundgren

ABSTRACTWe report the fabrication and the characterization of Metal Oxide Semiconductor (MOS) structure fabricated on thermally oxidized 3C-SiC grown by reactive magnetron sputtering. The structure and the composition of the SiO2 layer was studied by cross-sectional transmission electron microscopy (XTEM) Auger electron spectroscopy (AES). Homogeneous stoichiometric SiO2 layers formed with a well-defined interface to the faceted SiC(lll) top surface. Electrical properties of the MOS capacitor have been analyzed by employing the capacitance and conductance techniques. C-V curves shows the accumulation, depletion and deep depletion phases. The capacitance in the inversion regime is not saturated, as usually observed for wide-bandgap materials. The unintentional doping concentration determined from the 1/C2 curve was found to be as low as 2.8 × 1015 cm-3. The density of positive charges in the grown oxide and the interface states have been extracted by using high-frequency C-V and conductance techniques. The interface state density has been found to be in the order of 1011cm2-eV-1.


2013 ◽  
Vol 740-742 ◽  
pp. 695-698 ◽  
Author(s):  
Tsuyoshi Akagi ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki

Metal-oxide-semiconductor (MOS) capacitors with phosphorus localized near the SiO2/SiC interface were fabricated on 4H-SiC by direct POCl3treatment followed by SiO2deposition. Post-deposition annealing (PDA) temperature affected MOS device properties and phosphorus distribution in the oxide. The sample with PDA at 800 °C showed narrow phosphorus-doped oxide region, resulting in low interface state density near the conduction band edge and small flatband voltage shift after FN injection. The interfacial localization of phosphorus improved both interface properties and reliability of 4H-SiC MOS devices.


2013 ◽  
Vol 31 (1) ◽  
pp. 42-53 ◽  
Author(s):  
Banu Poobalan ◽  
Jeong Hyun Moon ◽  
Sang-Cheol Kim ◽  
Sung-Jae Joo ◽  
Wook Bahng ◽  
...  

Purpose – The high density of defects mainly attributed to the presence of silicon oxycarbides, residual C clusters, Si- and C-dangling bonds at or near the SiO2/SiC interface degrades the performance of metal-oxide-semiconductor (MOS) devices. In the effort of further improving the quality and enhancement of the SiC oxides thickness, post-oxidation annealed by a combination of nitric acid (HNO3) and water (H2O) vapor technique on thermally grown wet-oxides is introduced in this work. The paper aims to discuss these issues. Design/methodology/approach – A new technique of post-oxidation annealing (POA) on wet-oxidized n-type 4H-SiC in a combination of HNO3 and H2O vapor at various heating temperatures (70°C, 90°C and 110°C) of HNO3 solution has been introduced in this work. Findings – It has been revealed that the samples annealed in HNO3 + H2O vapour ambient by various heating temperatures of HNO3 solution; particularly at 110°C is able to produce oxide with lower interface-state density and higher breakdown voltage as compared to wet-oxidized sample annealed in N2 ambient. The substrate properties upon oxide removal show surface roughness reduces as the heating temperature of HNO3 solution increases, which is mainly attributed due to the significant reduction of carbon content at the SiC/SiO2 interface by C=N passivation and CO or CO2 out-diffusion. Originality/value – Despite being as a strong oxidizing agent, vaporized HNO3 can also be utilized as nitridation and hydrogen passivation agent in high temperature thermal oxidation ambient and these advantages were demonstrated in 4H-SiC.


2012 ◽  
Vol 717-720 ◽  
pp. 709-712 ◽  
Author(s):  
Shuji Katakami ◽  
Manabu Arai ◽  
Kensuke Takenaka ◽  
Yoshiyuki Yonezawa ◽  
Hitoshi Ishimori ◽  
...  

We investigated the effect of post-oxidation annealing in wet O2 and N2O ambient, following dry O2 oxidation on the SiC MOS interfacial properties by using p-type MOS capacitors. The interfacial properties were dramatically improved by the introduction of hydrogen or nitrogen atoms into the SiO2/SiC interface, in each POA process. Notably, the N2O-POA process at 1200 °C or higher reduced the interface state density more effectively than the wet-O2-POA process, and offers a promising method to further improve the inversion channel mobility of p-channel SiC MOS devices.


2013 ◽  
Vol 133 (7) ◽  
pp. 1279-1284
Author(s):  
Takuro Iwasaki ◽  
Toshiro Ono ◽  
Yohei Otani ◽  
Yukio Fukuda ◽  
Hiroshi Okamoto

2002 ◽  
Vol 09 (05n06) ◽  
pp. 1637-1640 ◽  
Author(s):  
J. CHAVEZ-RAMIREZ ◽  
M. AGUILAR-FRUTIS ◽  
M. GARCIA ◽  
E. MARTINEZ ◽  
O. ALVAREZ-FREGOSO ◽  
...  

Electrical characteristics of high quality aluminum oxide thin films deposited by the spray pyrolysis technique on GaAs substrates are reported. The films were deposited using a spraying solution of aluminum acetylacetonate in N,N-dimethylformamide and an ultrasonic mist generator. The substrates were (100) GaAs wafers Si-doped (1018 cm -3). The substrate temperature during deposition was in the range of 300–600°C. The electrical characteristics of these films were determined by capacitance and current versus voltage measurements by the incorporation of these films into metal-oxide-semiconductor structures. The interface state density resulted in the order of 1012 1/ eV-cm 2 and the films can stand electric fields higher than 5 MV/cm, without observing a destructive dielectric breakdown. The refractive index, measured by ellipsometry at 633 nm, resulted close to 1.64. The determination of the chemical composition of the films was achieved by energy dispersive X-ray spectroscopy; it resulted close to that of stoichiometric aluminum oxide (O/Al = 1.5) when films are deposited at substrate temperatures of 300–350°C.


2018 ◽  
Vol 18 (06) ◽  
pp. 1850039
Author(s):  
Abderrezzaq Ziane ◽  
Mohamed Amrani ◽  
Abdelaziz Rabehi ◽  
Zineb Benamara

Au/GaN/GaAs Schottky diode created by the nitridation of n-GaAs substrate which was exposed to a flow of active nitrogen created by a discharge source with high voltage in ultra-high vacuum with two different thicknesses of GaN layers (0.7[Formula: see text]nm and 2.2[Formula: see text]nm), the I–V and capacitance–voltage (C–V) characteristics of the Au/n-GaN/n-GaAs structures were studied for low- and high-frequency at room temperature. The measurements of I–V of the Au/n-GaN/n-GaAs Schottky diode were found to be strongly dependent on bias voltage and nitridation process. The electrical parameters are bound by the thickness of the GaN layer. The capacitance curves depict a behavior indicating the presence of interface state density, especially in the low frequency. The interface states density was calculated using the high- and low-frequency capacitance curves and it has been shown that the interface states density decreases with increasing of nitridation of the GaAs.


2006 ◽  
Vol 527-529 ◽  
pp. 1007-1010 ◽  
Author(s):  
Daniel B. Habersat ◽  
Aivars J. Lelis ◽  
G. Lopez ◽  
J.M. McGarrity ◽  
F. Barry McLean

We have investigated the distribution of oxide traps and interface traps in 4H Silicon Carbide MOS devices. The density of interface traps, Dit, was characterized using standard C-V techniques on capacitors and charge pumping on MOSFETs. The number of oxide traps, NOT, was then calculated by measuring the flatband voltage VFB in p-type MOS capacitors. The amount that the measured flatband voltage shifts from ideal, minus the contributions due to the number of filled interface traps Nit, gives an estimate for the number of oxide charges present. We found Dit to be in the low 1011cm−2eV−1 range in midgap and approaching 1012 −1013cm−2eV−1 near the band edges. This corresponds to an Nit of roughly 2.5 ⋅1011cm−2 for a typical capacitor in flatband at room temperature. This data combined with measurements of VFB indicates the presence of roughly 1.3 ⋅1012cm−2 positive NOT charges in the oxide near the interface for our samples.


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