scholarly journals High-Efficiency Millimeter-wave Single-ended and Differential Fundamental Oscillators in CMOS

Author(s):  
Hao Wang ◽  
Jingjun Chen ◽  
James Do ◽  
Hooman Rashtian ◽  
Xiaoguang Liu

This paper reports an approach to designing compact high efficiency millimeter-wave fundamental oscillators operating above the fmax=2 of the active device. The approach takes full consideration of the nonlinearity of the active device and the finite quality factor of the passive devices to provide an accurate and optimal oscillator design in terms of the output power and efficiency. The 213-GHz single-ended and differential fundamental oscillators in 65-nm CMOS technology are presented to demonstrate the effectiveness of the proposed method. Using a compact capacitive transformer design, the single-ended oscillator achieves 0.79-mW output power per transistor (16 μm) at 1.0-V supply and a peak dc-to-RF efficiency of 8.02% (VDD=0.80 V) within a core area of 0.0101mm2, and the measured phase noise is -93:4 dBc/Hz at 1-MHz offset. The differential oscillator exhibits approximately the same performance. A 213-GHz fundamental voltage-controlled oscillator (VCO) with bulk tuning method is also developed in this work. The measured peak efficiency of the VCO is 6.02% with a tuning rang of 2.3% at 0.6-V supply.

2020 ◽  
Author(s):  
Hao Wang ◽  
Jingjun Chen ◽  
James Do ◽  
Hooman Rashtian ◽  
Xiaoguang Liu

This paper reports an approach to designing compact high efficiency millimeter-wave fundamental oscillators operating above the fmax=2 of the active device. The approach takes full consideration of the nonlinearity of the active device and the finite quality factor of the passive devices to provide an accurate and optimal oscillator design in terms of the output power and efficiency. The 213-GHz single-ended and differential fundamental oscillators in 65-nm CMOS technology are presented to demonstrate the effectiveness of the proposed method. Using a compact capacitive transformer design, the single-ended oscillator achieves 0.79-mW output power per transistor (16 μm) at 1.0-V supply and a peak dc-to-RF efficiency of 8.02% (VDD=0.80 V) within a core area of 0.0101mm2, and the measured phase noise is -93:4 dBc/Hz at 1-MHz offset. The differential oscillator exhibits approximately the same performance. A 213-GHz fundamental voltage-controlled oscillator (VCO) with bulk tuning method is also developed in this work. The measured peak efficiency of the VCO is 6.02% with a tuning rang of 2.3% at 0.6-V supply.


This paper presents the design of an LC oscillator using inductive feedback technique in bulk CMOS 22 nm technology using predictive technology models. The core oscillator is based on the popular Cherry Hooper amplifier topology. The development of the oscillator circuit from the standard Cherry Hooper topology is discussed in this paper with detailed analysis. The inductors are modelled by considering the various effects in this frequency range. The broadband technique used in the CH topology enables the circuit to oscillate at frequencies more than millimeter wave regime. By employing MOS varactors the designed oscillator was converted into a voltage-controlled oscillator also. The fundamental mode of the oscillator is around 372 GHz with a phase noise measured around -70 dBc/ Hz at 10 MHz offset. The VCO has a tuning range of about 490 MHz when the voltage is varied from 0.3 to 0.8 V. The oscillator circuit consumes power of 3.75 mW from a power supply of 0.8 V


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 477 ◽  
Author(s):  
Mohammad Arif Sobhan Bhuiyan ◽  
Md Torikul Islam Badal ◽  
Mamun Bin Ibne Reaz ◽  
Maria Liz Crespo ◽  
Andres Cicuttin

Power amplifiers (PAs) are among the most crucial functional blocks in the radio frequency (RF) frontend for reliable wireless communication. PAs amplify and boost the input signal to the required output power. The signal is amplified to make it sufficiently high for the transmitter to propagate the required distance to the receiver. Attempted advancements of PA have focused on attaining high-performance RF signals for transmitters. Such PAs are expected to require low power consumption while producing a relatively high output power with a high efficiency. However, current PA designs in nanometer and micrometer complementary metal–oxide semiconductor (CMOS) technology present inevitable drawbacks, such as oxide breakdown and hot electron effect. A well-defined architecture, including a linear and simple functional block synthesis, is critical in designing CMOS PA for various applications. This article describes the different state-of-the art design architectures of CMOS PA, including their circuit operations, and analyzes the performance of PAs for 2.4 GHz ISM (industrial, scientific, and medical) band applications.


2019 ◽  
Vol 11 (7) ◽  
pp. 546-553 ◽  
Author(s):  
Marcin Góralczyk ◽  
Wojciech Wojtasiak

AbstractThis paper describes the development of a power amplifier operating over a 2.4–2.5 GHz frequency range with the output power level more than 15 W and 60% PAE. The transistor applied was the 10 W (13 W Psat) power GaN HEMT (CGH40010F from Wolfspeed) recommended up to 6 GHz. A harmonic tuning method was used to achieve even 30% more output power than the CGH40010 transistor was specified to deliver while maintaining high gain and high efficiency. Furthermore, an accuracy analysis of amplifier design was also conducted. It included validation and correction of the available transistor models as well as validation of the models of microstrip circuits implemented in ADS. Finally, it was concluded that both the mentioned sources of errors contributed at a similar level.


2017 ◽  
Vol 64 (6) ◽  
pp. 605-609 ◽  
Author(s):  
Med Nariman ◽  
Farid Shirinfar ◽  
Sudhakar Pamarti ◽  
Ahmadreza Rofougaran ◽  
Franco De Flaviis

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