scholarly journals Minimum MOS Transistor Count Fractional-Order Voltage-Mode and Current-Mode Filters

Technologies ◽  
2019 ◽  
Vol 7 (4) ◽  
pp. 85
Author(s):  
Panagiotis Bertsias ◽  
Costas Psychalinos ◽  
Ahmed S. Elwakil ◽  
Brent Maundy

Voltage-mode and current-mode fractional-order filter topologies, which are capable of realizing various types of transfer functions, are introduced in this paper. Thanks to the employment of the transconductance parameter of the MOS transistors, the derived filter structures offer the benefit of the electronic adjustment of their frequency characteristics. With regards to the literature, the number of MOS transisitors is minimized leading to significant reduction of the circuit complexity and power dissipation. Simulation results, derived using the Design Kit of the 0.35 μm Austria Mikro Systeme CMOS process and the Cadence IC design suite, confirm the correct operation of the presented filter structures.

2017 ◽  
Vol 26 (07) ◽  
pp. 1750121 ◽  
Author(s):  
Thanat Nonthaputha ◽  
Montree Kumngern

This paper presents new programmable universal biquadratic filters using current conveyor transconductance amplifiers (CCTAs) by which both voltage- and current-mode filters can be obtained. The proposed filters use second-generation current conveyor (CCII) which is the first stage of CCTA to operate as current conveyor analog switch (CCAS) and this CCAS will be used to program the filtering functions such as low-pass, high-pass, band-pass, band-stop and all-pass filters. Unlike previous universal filters, the filtering functions of the proposed filters can be programmed using the bias currents of CCTAs without changing any input and output connections. The natural frequency and quality factor of all filtering functions can be controlled electronically and orthogonally using the bias currents of transconductance amplifiers. Also gain response of all transfer functions can be adjusted. The active and passive sensitivities of the filters are low. The proposed programmable filters have been simulated using 0.18[Formula: see text][Formula: see text]m CMOS process from TSMC. PSPICE simulation results are included to confirm workability of the proposed circuits.


2017 ◽  
Vol 26 (06) ◽  
pp. 1750098 ◽  
Author(s):  
Mustafa Konal ◽  
Firat Kacar

This paper presents two grounded MOS only active inductor circuits. Both circuits have only two MOS transistors and two biasing currents. Thus, the proposed active inductors provide small chip area, tunability, low power consumption with 150[Formula: see text][Formula: see text]W and 90[Formula: see text][Formula: see text]W, respectively. To analyze their performance, a second-order band-pass filter and a third-order high-pass filter structures are presented with low noise as 7.5[Formula: see text]nV/[Formula: see text] and 9.14[Formula: see text]nV/[Formula: see text], respectively. The designed active inductors and filters are simulated in 0.18[Formula: see text][Formula: see text]m CMOS process parameters using LTSPICE.


Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 710
Author(s):  
Xiaogang Wang ◽  
Bingwen Qiu ◽  
Hongdong Wang

In this paper, several modeling methods for the continuous current mode (CCM) fractional-order Cuk converter are investigated. First, the state space averaging method is used to establish the model. Based on this model, the expressions of inductors’ current and capacitor voltage as well as the transfer functions are derived. Then, the equivalent small parameter method (ESPM) is employed to model the converter. Based on the Oustaloup filter principle, the approximate models of fractional-order capacitor and inductors are constructed, which consist of integer-order components, to build the circuit model (CM) of the converter. In addition, the numerical model (NM) of the converter is established. Simulation results are provided to compare the modeling methods, which show that the ESPM has some advantages over the other methods. Finally, the hardware-in-the-loop experiment is conducted to verify the effectiveness of the circuit model.


2020 ◽  
Vol 10 (2) ◽  
pp. 18 ◽  
Author(s):  
Elpida Kaskouta ◽  
Stavroula Kapoulea ◽  
Costas Psychalinos ◽  
Ahmed S. Elwakil

The fractional-order lung impedance model of the human respiratory tree is implemented in this paper, using Operational Transconductance Amplifiers. The employment of such active element offers electronic adjustment of the impedance characteristics in terms of both elements values and orders. As the MOS transistors in OTAs are biased in the weak inversion region, the power dissipation and the dc bias voltage of operation are also minimized. In addition, the partial fraction expansion tool has been utilized, in order to achieve reduction of the spread of the required time-constants and scaling factors. The performance of the proposed scheme has been evaluated, at post-layout level, using MOS transistors models provided by the 0.35 μ m Austria Mikro Systeme technology CMOS process, and the Cadence IC design suite.


2013 ◽  
Vol 22 (01) ◽  
pp. 1250072 ◽  
Author(s):  
ALI KIRCAY ◽  
M. SERHAT KESERLIOGLU ◽  
UGUR CAM

In this paper, a new current-mode second-order square-root-domain general notch filter is proposed. The design is based on the state-space synthesis method with two subcircuit; square-root and squarer/divider circuits. In the circuit, the input and the output values, and dominant variables are all currents. Only MOS transistors and grounded capacitors are required to realize the filter circuit. Three cases of the second-order notch filter were obtained. The regular notch was obtained when ωn = ωp, the lowpass notch was obtained when ωn > ωp, and the highpass notch was obtained when ωn < ωp. The center frequency, and the notch frequency of the filter can be electronically tuned by changing external currents. Time and frequency domain simulations are performed using PSPICE program for the filter to verify the theory and to show the performance of it. For this purpose, the filter is simulated by using TSMC 0.35 μm Level 3 CMOS process parameters.


Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1856
Author(s):  
Yen-Chung Chiang ◽  
Juo-Chen Chen ◽  
Yu-Hsin Chang

In a radio frequency (RF) system, it is possible to use variable inductors for providing tunable or selective frequency range. Variable inductors can be implemented by the microelectromechanical system (MEMS) process or by using transistors as switches to change the routing of coils or coupling quantities. In this paper, we investigated the design method of a variable inductor by using MOS transistors to switch the main coil paths and the secondary coupled coils. We observed the effects of different metal layers, turn numbers, and layout arrangements for secondary-coupled coils and compared their characteristics on the inductances and quality factors. We implemented two chips in the 0.18 m CMOS process technology for each kind of arrangement for verification. One inductor can achieve inductance values from about 300 pH to 550 pH, and the other is between 300 pH and 575 pH, corresponding to 59.3% and 62.5%, respectively, inductance variation range at 4 GHz frequency. Additionally, their fine step sizes of the switched inductances are from 0.5% to 6% for one design, and 1% to 12.5% for the other. We found that both designs achieved a large inductance tuning range and moderate inductance step sizes with a slight difference behavior on the inductance variation versus frequency.


Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1683
Author(s):  
Winai Jaikla ◽  
Fabian Khateb ◽  
Tomasz Kulej ◽  
Koson Pitaksuttayaprot

This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is −49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter.


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