scholarly journals A New Approach to Power Efficiency Improvement of Ultrasonic Transmitters via a Dynamic Bias Technique

Sensors ◽  
2021 ◽  
Vol 21 (8) ◽  
pp. 2795
Author(s):  
Kyeongjin Kim ◽  
Hojong Choi
Keyword(s):  
Power Amplifier ◽  
Bias Voltage ◽  
Power Efficiency ◽  
Ultrasonic Transducer ◽  
Harmonic Distortion ◽  
Active Device ◽  
Active Devices ◽  
Power Added Efficiency ◽  
Signal Characteristics ◽  
Ultrasonic Transmitter

To obtain a high-quality signal from an ultrasound system through the transmitter, it is necessary to achieve an appropriate operating point of the power amplifier in the ultrasonic transmitter by applying high static bias voltage. However, the power amplifier needs to be operated at low bias voltage, because a power amplifier operating at high bias voltage may consume a large amount of power and increase the temperature of the active devices, worsening the signal characteristics of the ultrasound systems. Therefore, we propose a new method of increasing the bias voltage for a specific period to solve this problem by reducing the output signal distortion of the power amplifier and decreasing the load on the active device. To compare the performance of the proposed method, we measured and compared the signals of the amplifier with the proposed technique and the amplifier only. Notably, improvement was achieved with 11.1% of the power added efficiency and 3.23% of the total harmonic distortion (THD). Additionally, the echo signal generated by the ultrasonic transducer was improved by 2.73 dB of amplitude and 0.028% of THD under the conditions of an input signal of 10 mW. Therefore, the proposed method could be useful for improving ultrasonic transmitter performance using the developed technique.

A 5.2/5.8 GHz Dual Band On-Off Keying Transmitter Design for Bio-Signal Transmission

2018 ◽  
Vol 3 (2) ◽  
Author(s):  
Chang-Hsi Wu ◽  
Hong-Cheng You ◽  
Shun-Zhao Huang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Power Efficiency ◽  
Supply Voltage ◽  
Maximum Output Power ◽  
Dual Band ◽  
Maximum Output ◽  
Power Combiner ◽  
Power Added Efficiency ◽  
Chip Size

Abstract An architecture of 5.2/5.8-GHz dual-band on-off keying (DBOOK) modulated transmitter is designed in a 0.18-μm CMOS technology. The proposed DBOOK transmitter is used in the biosignal transmission system with high power efficiency and small area. To reduce power consumption and enhance output swing, two pairs of center-tapped transformers are used as both LC tank and source grounding choke for the designed voltage controlled oscillator (VCO). Switching capacitances are used to achieve dual band operations, and a complemented power combiner is used to merge the differential output power of VCO to a single-ended output. Besides, the linearizer circuits are used in the proposed power amplifier with wideband output matching to improve the linearity both at 5.2/5.8-GHz bands. The designed DBOOK transmitter is implemented by dividing it into two chips. One chip implements the dual-band switching VCO and power combiner, and the other chip implements a linear power amplifier including dual-band operation. The first chip drives an output power of 2.2mW with consuming power of 5.13 mW from 1.1 V supply voltage. With the chip size including pad of 0.61 × 0.91 m2, the measured data rate and transmission efficiency attained are 100 Mb/s and 51 pJ/bit, respectively. The second chip, for power enhanced mode, exhibits P1 dB of −9 dBm, IIP3 of 1 dBm, the output power 1 dB compression point of 12.42 dBm, OIP3 of about 21 dBm, maximum output power of 17.02/16.18 dBm, and power added efficiency of 17.13/16.95% for 5.2/ 5.8 GHz. The chip size including pads is 0:693 × 1:084mm2.

Slurry Concentration Detection Theory Based on the Ultrasonic Echo Attenuation

2012 ◽  
Vol 588-589 ◽  
pp. 998-1001
Author(s):  
Fu Jin Li ◽  
Chun Yan An
Keyword(s):  
Data Processing ◽  
Power Amplifier ◽  
Ultrasonic Transducer ◽  
Echo Signal ◽  
Ultrasonic Sensors ◽  
Concentration Data ◽  
Slurry Concentration ◽  
Logarithmic Amplifier ◽  
Ultrasonic Echo ◽  
Ultrasonic Transmitter

Decay theory based on the ultrasonic echo, with ultrasonic sensors measure the concentration of the slurry through the use of the controller to control the ultrasonic transmitter and receiver circuits, this system will be integrated waveform chip MAX038 generate burst, and then after the power amplifier drive ultrasonic transducer transmits ultrasonic, use of the logarithmic amplifier attenuation of the echo signal through the mud interface to reach the receiving transducer in the ultrasonic detector amplification, concentration data processing obtained by the microcontroller.

scholarly journals Power Efficient GaN HEMT High Power Amplifier Design Operating at 5-7GHz Bandwidth

2020 ◽  
pp. 166-170
Author(s):  
Syed Mudassir Hussain
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
Power Efficiency ◽  
Satellite Communication ◽  
Design System ◽  
Passive Element ◽  
Power Efficient ◽  
Power Added Efficiency ◽  
High Power Amplifier ◽  
Simulation Results

For the next generation applications in mobile communication, radar and satellite communication we need the devices that can operate at high frequencies and high power with minimum power consumption. There is a growing importance in the recent years for the development of GaN transistors.This paper presents design of the power efficient GaN based high power amplifier operating in the bandwidth of 5GHz – 7GHz based on a 12 Watt Discrete Power GaN on SiC HEMT from TriQuint. In this manuscript the design of RF power amplifier, its stability, input and output matching impedance and performance for 5-7GHz is presented. Design and simulations of the power amplifier are carried out using Advanced Design System (ADS). Simulation results of device stability, gain and Power Added Efficiency (PAE) shows good accordance with the specifications and parameters of the device.In the design process, for better correlation in measurement and simulation results precision of passive element models are specially considered. In 1 dB compression point for the designed high power amplifier, the experiment and the simulation results show a Power Efficiency of 68%.

scholarly journals A Ruggedness Improved Mobile Radio Frequency Power Amplifier Module with Dynamic Impedance Correction by Software Defined Atomization

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1317 ◽  
Author(s):  
Jooyoung Jeon ◽  
Myounggon Kang
Keyword(s):  
Radio Frequency ◽  
Power Amplifier ◽  
Bias Voltage ◽  
Integrated Circuit ◽  
Complementary Metal Oxide Semiconductor ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Impedance Change ◽  
Load Impedance ◽  
Power Added Efficiency

A ruggedness improved multi-band radio frequency (RF) power amplifier (PA) module applicable to mobile handsets, which are required to survive against a serious load impedance change under extreme power and bias conditions, is presented. In this method, the load impedance of PA is adaptively adjusted with a digitally controlled impedance corrector to keep the PA safe by performing a load mismatch detection. The impedance mismatch detector, impedance corrector, and other RF switches were all integrated into a single integrated circuit (IC) using silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS). For the verification purpose, a 2-stage hetero junction bipolar transistor (HBT) PA module adopting this method was fabricated. At a frequency of 1915 MHz, a collector bias voltage of 4.2 V, and over a wider range of load impedance variation between a VSWR of 1 and a VSWR of 5.5, it did not fail. When this technique was not applied with a voltage standing wave ratio (VSWR) range of 1 to 4, it resulted in an acceptable RF performance degradation of 1% power added efficiency (PAE) in envelope tracking (ET) mode. Moreover, it survived at a bias voltage 1V larger than when the technique was not applied for the same mismatch condition.

scholarly journals Compact 20-W GaN Internally Matched Power Amplifier for 2.5 GHz to 6 GHz Jammer Systems

Micromachines ◽  
2020 ◽  
Vol 11 (4) ◽  
pp. 375
Author(s):  
Min-Pyo Lee ◽  
Seil Kim ◽  
Sung-June Hong ◽  
Dong-Wook Kim
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Frequency ◽  
Continuous Wave ◽  
Low Frequency ◽  
Single Layer ◽  
Dielectric Constants ◽  
High Electron ◽  
Active Device ◽  
Power Added Efficiency

In this paper, we demonstrate a compact 20-W GaN internally matched power amplifier for 2.5 to 6 GHz jammer systems which uses a high dielectric constant substrate, single-layer capacitors, and shunt/series resistors for low-Q matching and low-frequency stabilization. A GaN high-electron-mobility transistor (HEMT) CGH60030D bare die from Wolfspeed was used as an active device, and input/output matching circuits were implemented on two different substrates using a thin-film process, relative dielectric constants of which were 9.8 and 40, respectively. A series resistor of 2.1 Ω was chosen to minimize the high-frequency loss and obtain a flat gain response. For the output matching circuit, double λ/4 shorted stubs were used to supply the drain current and reduce the output impedance variation of the transistor between the low-frequency and high-frequency regions, which also made wideband matching feasible. Single-layer capacitors effectively helped reduce the size of the matching circuit. The fabricated GaN internally matched power amplifier showed a linear gain of about 10.2 dB, and had an output power of 43.3–43.9 dBm (21.4–24.5 W), a power-added efficiency of 33.4–49.7% and a power gain of 6.2–8.3 dB at the continuous-wave output power condition, from 2.5 to 6 GHz.

scholarly journals S Band Hybrid Power Amplifier in GaN Technology with Input/Output Multi Harmonic Tuned Terminations

Electronics ◽  
2021 ◽  
Vol 10 (18) ◽  
pp. 2318
Author(s):  
Sandro Ghisotti ◽  
Stefano Pisa ◽  
Paolo Colantonio
Keyword(s):  
Power Amplifier ◽  
Power Gain ◽  
Large Signal ◽  
Active Device ◽  
Hybrid Form ◽  
Third Harmonic ◽  
Power Added Efficiency ◽  
Hybrid Power ◽  
Input And Output ◽  
Operating Bandwidth

In this paper, the design, fabrication, and measurements of an S band multi harmonic tuned power amplifier in GaN technology is described. The amplifier has been designed by exploiting second and third harmonic tuning conditions at both input and output ports of the active device. The amplifier has been realized in a hybrid form, and characterized in terms of small and large signal performance. An operating bandwidth of 300 MHz around 3.55 GHz, with 42.3 dBm output power, 9.3 dB power gain and 53.5% power added efficiency PAE (60% drain efficiency) at 3.7 GHz are measured.

scholarly journals Low Voltage CMOS Power Amplifier with Integrated Capacitive Harmonic Termination

2019 ◽  
Vol 9 (2) ◽  
pp. 108-111
Keyword(s):  
Power Amplifier ◽  
Low Voltage ◽  
Second Harmonic ◽  
Harmonic Distortion ◽  
Main Stage ◽  
Third Order ◽  
Mobile Wireless ◽  
Power Added Efficiency ◽  
Novel Design ◽  
Intercept Point

This paper presents a novel design methodology to improve the power added efficiency (PAE) for a CMOS power amplifier (PA), qualifying it for low voltage mobile wireless communications such as the NB-IoT. The capacitive harmonic termination (CHT) integrated at the output of the main stage PA to minimise the effect of the second harmonic distortion in order to improve the PAE. The CHT PA able to deliver a PAE of 40% at drain voltage of 3.3 V from 1.9 GHz - 2.1 GHz. The corresponding power gain is 14 dB for 200 MHz bandwidth. The achieved third-order intercept point (OIP3) is 33 dBm, which serves as a proof that the CHT technique has a minimal trade-off to the linearity performance of the PA.

scholarly journals Machine-Learning Assisted Optimisation of Free-Parameters of a Dual-Input Power Amplifier for Wideband Applications

Sensors ◽  
2021 ◽  
Vol 21 (8) ◽  
pp. 2831
Author(s):  
Teng Wang ◽  
Wantao Li ◽  
Roberto Quaglia ◽  
Pere L. Gilabert
Keyword(s):  
Power Amplifier ◽  
Power Efficiency ◽  
Average Power ◽  
Long Term Evolution ◽  
Input Power ◽  
Global Optimisation ◽  
Power Ratio ◽  
Term Evolution ◽  
Free Parameters

This paper presents an auto-tuning approach for dual-input power amplifiers using a combination of global optimisation search algorithms and adaptive linearisation in the optimisation of a multiple-input power amplifier. The objective is to exploit the extra degrees of freedom provided by dual-input topologies to enhance the power efficiency figures along wide signal bandwidths and high peak-to-average power ratio values, while being compliant with the linearity requirements. By using heuristic search global optimisation algorithms, such as the simulated annealing or the adaptive Lipschitz Optimisation, it is possible to find the best parameter configuration for PA biasing, signal calibration, and digital predistortion linearisation to help mitigating the inherent trade-off between linearity and power efficiency. Experimental results using a load-modulated balanced amplifier as device-under-test showed that after properly tuning the selected free-parameters it was possible to maximise the power efficiency when considering long-term evolution signals with different bandwidths. For example, a carrier aggregated a long-term evolution signal with up to 200 MHz instantaneous bandwidth and a peak-to-average power ratio greater than 10 dB, and was amplified with a mean output power around 33 dBm and 22.2% of mean power efficiency while meeting the in-band (error vector magnitude lower than 1%) and out-of-band (adjacent channel leakage ratio lower than −45 dBc) linearity requirements.

Power efficiency enhancement analysis of an inverse class D power amplifier for NB-IoT applications

2021 ◽  
Author(s):  
Mehrdad Harifi-Mood ◽  
Abolfazl Bijari ◽  
Hossein Alizadeh ◽  
Mehdi Forouzanfar ◽  
Nabeeh Kandalaft
Keyword(s):  
Power Amplifier ◽  
Power Efficiency ◽  
Efficiency Enhancement ◽  
Iot Applications ◽  
Class D
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