scholarly journals Compact 20-W GaN Internally Matched Power Amplifier for 2.5 GHz to 6 GHz Jammer Systems

Micromachines ◽  
2020 ◽  
Vol 11 (4) ◽  
pp. 375
Author(s):  
Min-Pyo Lee ◽  
Seil Kim ◽  
Sung-June Hong ◽  
Dong-Wook Kim
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Frequency ◽  
Continuous Wave ◽  
Low Frequency ◽  
Single Layer ◽  
Dielectric Constants ◽  
High Electron ◽  
Active Device ◽  
Power Added Efficiency

In this paper, we demonstrate a compact 20-W GaN internally matched power amplifier for 2.5 to 6 GHz jammer systems which uses a high dielectric constant substrate, single-layer capacitors, and shunt/series resistors for low-Q matching and low-frequency stabilization. A GaN high-electron-mobility transistor (HEMT) CGH60030D bare die from Wolfspeed was used as an active device, and input/output matching circuits were implemented on two different substrates using a thin-film process, relative dielectric constants of which were 9.8 and 40, respectively. A series resistor of 2.1 Ω was chosen to minimize the high-frequency loss and obtain a flat gain response. For the output matching circuit, double λ/4 shorted stubs were used to supply the drain current and reduce the output impedance variation of the transistor between the low-frequency and high-frequency regions, which also made wideband matching feasible. Single-layer capacitors effectively helped reduce the size of the matching circuit. The fabricated GaN internally matched power amplifier showed a linear gain of about 10.2 dB, and had an output power of 43.3–43.9 dBm (21.4–24.5 W), a power-added efficiency of 33.4–49.7% and a power gain of 6.2–8.3 dB at the continuous-wave output power condition, from 2.5 to 6 GHz.

scholarly journals A highly efficient 3.5 GHz inverse class-F GaN HEMT power amplifier

2010 ◽  
Vol 2 (3-4) ◽  
pp. 317-324 ◽  
Author(s):  
Paul Saad ◽  
Christian Fager ◽  
Hossein Mashad Nemati ◽  
Haiying Cao ◽  
Herbert Zirath ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Continuous Wave ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
Power Added Efficiency ◽  
Average Ratio ◽  
Gan Hemt ◽  
Continuous Wave Signal ◽  
Class F

This paper presents the design and implementation of an inverse class-F power amplifier (PA) using a high power gallium nitride high electron mobility transistor (GaN HEMT). For a 3.5 GHz continuous wave signal, the measurement results show state-of-the-art power-added efficiency (PAE) of 78%, a drain efficiency of 82%, a gain of 12 dB, and an output power of 12 W. Moreover, over a 300 MHz bandwidth, the PAE and output power are maintained at 60% and 10 W, respectively. Linearized modulated measurements using 20 MHz bandwidth long-term evolution (LTE) signal with 11.5 dB peak-to-average ratio show that −42 dBc adjacent channel power ratio (ACLR) is achieved, with an average PAE of 30%, −47 dBc ACLR with an average PAE of 40% are obtained when using a WCDMA signal with 6.6 dB peak-to-average ratio (PAR).

scholarly journals Design of W-Band GaN-on-Silicon Power Amplifier Using Low Impedance Lines

2021 ◽  
Vol 11 (19) ◽  
pp. 9017
Author(s):  
Jinho Jeong ◽  
Yeongmin Jang ◽  
Jongyoun Kim ◽  
Sosu Kim ◽  
Wansik Kim
Keyword(s):  
Power Density ◽  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
Common Source ◽  
High Electron ◽  
Large Signal ◽  
Power Added Efficiency ◽  
W Band ◽  
Gan On Si

In this paper, a high-power amplifier integrated circuit (IC) in gallium-nitride (GaN) on silicon (Si) technology is presented at a W-band (75–110 GHz). In order to mitigate the losses caused by relatively high loss tangent of Si substrate compared to silicon carbide (SiC), low-impedance microstrip lines (20–30 Ω) are adopted in the impedance matching networks. They allow for the impedance transformation between 50 Ω and very low impedances of the wide-gate transistors used for high power generation. Each stage is matched to produce enough power to drive the next stage. A Lange coupler is employed to combine two three-stage common source amplifiers, providing high output power and good input/output return loss. The designed power amplifier IC was fabricated in the commercially available 60 nm GaN-on-Si high electron mobility transistor (HEMT) foundry. From on-wafer probe measurements, it exhibits the output power higher than 26.5 dBm and power added efficiency (PAE) higher than 8.5% from 88 to 93 GHz with a large-signal gain > 10.5 dB. Peak output power is measured to be 28.9 dBm with a PAE of 13.3% and a gain of 9.9 dB at 90 GHz, which corresponds to the power density of 1.94 W/mm. To the best of the authors’ knowledge, this result belongs to the highest output power and power density among the reported power amplifier ICs in GaN-on-Si HEMT technologies operating at the W-band.

scholarly journals Electrical performances of AlInN/GaN HEMTs. A comparison with AlGaN/GaN HEMTs with similar technological process

2011 ◽  
Vol 3 (3) ◽  
pp. 301-309 ◽  
Author(s):  
Olivier Jardel ◽  
Guillaume Callet ◽  
Jérémy Dufraisse ◽  
Michele Piazza ◽  
Nicolas Sarazin ◽  
...  
Keyword(s):  
High Frequency ◽  
Continuous Wave ◽  
High Electron Mobility Transistors ◽  
High Electron ◽  
Power Added Efficiency ◽  
Electron Mobility Transistors ◽  
X Band ◽  
Gan Hemts ◽  
Load Pull ◽  
Interesting Alternative

A study of the electrical performances of AlInN/GaN High Electron Mobility Transistors (HEMTs) on SiC substrates is presented in this paper. Four different wafers with different technological and epitaxial processes were characterized. Thanks to intensive characterizations as pulsed-IV, [S]-parameters, and load-pull measurements from S to Ku bands, it is demonstrated here that AlInN/GaN HEMTs show excellent power performances and constitute a particularly interesting alternative to AlGaN/GaN HEMTs, especially for high-frequency applications beyond the X band. The measured transistors with 250 nm gate lengths from different wafers delivered in continuous wave (cw): 10.8 W/mm with 60% associated power added efficiency (PAE) at 3,5 GHz, 6.6 W/mm with 39% associated PAE at 10.24 GHz, and 4.2 W/mm with 43% associated PAE at 18 GHz.

scholarly journals Broadband Millimeter-Wave Power Amplifier Using Modified 2D Distributed Power Combining

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 899
Author(s):  
Jihoon Kim
Keyword(s):  
Output Power ◽  
Millimeter Wave ◽  
Power Amplifier ◽  
Power Distribution ◽  
Phase Variation ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
Power Combining ◽  
Distributed Power ◽  
Power Added Efficiency

A broadband millimeter-wave (mmWave) power amplifier (PA) was implemented using a modified 2D distributed power combining technique. The proposed power combining was based on a single-ended dual-fed distributed combining (SEDFDC) design technique using zero-phase shifting (ZPS) transmission lines. To improve the input/output power distribution of each power cell within a wide frequency range, N/2-way power dividers/combiners were inserted into the distributed combining structure. Modified ZPS lines also simplified the combining structure and curbed phase variation according to the frequency. These modifications enabled power combining cells to increase without degrading the power bandwidth. The proposed PA was fabricated with a commercial 0.15 μm GaAs pseudo high electron-mobility transistor (pHEMT) monolithic microwave-integrated circuit (MMIC) process. It exhibited 20.3 to 24.2 dBm output power (Pout), 12.9 to 21.8 dB power gain, and 5.2% to 12.7% power-added efficiency (PAE) between 26 and 56 GHz.

scholarly journals A 28 GHz Linear Power Amplifier Based on CPW Matching Networks with Series-Connected DC-Blocking Capacitors

Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 617 ◽  
Author(s):  
Qingzhen Xia ◽  
Dongze Li ◽  
Jiawei Huang ◽  
Jinwei Li ◽  
Hudong Chang ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Phased Array ◽  
Continuous Wave ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Error Vector Magnitude ◽  
Output Stage ◽  
Power Added Efficiency ◽  
Matching Networks

In this paper, the influence of the DC-blocking capacitors leveraged in coplanar waveguide (CPW) matching networks is studied. CPW matching networks with series-connected DC-blocking capacitors are less sensitive to capacitance and are adopted in a 28 GHz power amplifier (PA). The PA targeting fifth-generation (5G) phased array is developed in 90 nm silicon-on-insulator complementary-metal-oxide-semiconductor (SOI CMOS) technology. A stacked field-effect-transistor (FET) architecture is elected in the output stage to boost the output power and reduce the die area. The PA with a core area of 0.31 mm2 demonstrates a maximum small signal gain of 13.7 dB and a −3 dB bandwidth of 6.3 GHz (22.9–29.2 GHz). The PA achieves a measured saturated output power (Psat) of 14.4 dBm and a peak power added efficiency (PAE) of 25% for continuous wave signals. At 24/25.6/28 GHz, the PA achieves +7.87/+9.16/+10.7 dBm measured output power and 6.21%/8.11%/10.17% PAE at −25 dBc error vector magnitude(EVM) for a 250 MHz-wide 64-quadrature amplitude modulation (64-QAM). The developed linear PA provides a great potential for low-cost 5G phased array transceivers.

scholarly journals Octave bandwidth S- and C-band GaN-HEMT power amplifiers for future 5G communication

2018 ◽  
Vol 10 (5-6) ◽  
pp. 737-743 ◽  
Author(s):  
Felix Rautschke ◽  
Stefan May ◽  
Sebastian Drews ◽  
Daniel Maassen ◽  
Georg Boeck
Keyword(s):  
Output Power ◽  
Power Amplifiers ◽  
Communication Systems ◽  
Continuous Wave ◽  
High Electron ◽  
Power Gain ◽  
Frequency Range ◽  
Large Signal ◽  
Power Added Efficiency ◽  
5G Communication

AbstractIn this contribution, a design methodology for octave-bandwidth power amplifiers (PA) for 5G communication systems using surface mount dual-flat-no-lead packaged gallium-nitride high-electron-mobility transistor devices is presented. Systematic source- and load-pull simulations have been used to find the optimum impedances across 75% fractional bandwidth for S- (1.9–4.2 GHz) and C-band (3.8–8.4 GHz) PAs. The harmonic impact is considered to improve the output power and efficiency of the PAs. Utilizing the characteristic behavior of the transistors leads to modified optimum fundamental load impedances for the low-frequency range, which have higher gain compared with high-frequency range, and minimize the influence of the higher harmonics. Continuous wave large-signal measurements of the realized S-Band PA show a power added efficiency (PAE) of more than 40% from 1.9–4.2 GHz and a flat power gain of 11 dB while achieving a saturated output power of 10 W. The measured performance of the C-Band PA demonstrates a delivered power between 3.5 and 5 W across the frequency range of 3.8–8.4 GHz. A flat power gain of around 9 ± 0.5 dB with 26–40% PAE is achieved.

A 23.3 dBm CMOS power amplifier with third-order gm cancellation linearization technique achieving OIP3 of 34 dBm

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Selvakumar Mariappan ◽  
Jagadheswaran Rajendran ◽  
Norlaili Mohd Noh ◽  
Yusman Yusof ◽  
Narendra Kumar
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Continuous Wave ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Third Order ◽  
Content Type ◽  
Power Added Efficiency ◽  
Driver Amplifier ◽  
Continuous Wave Signal

Purpose The purpose of this paper is to implement a highly linear 180 nm complementary metal oxide semiconductor (CMOS) power amplifier (PA) to meet the stringent linearity requirement of an long term evolution (LTE) signal with minimum trade-off to power added efficiency (PAE). Design/methodology/approach The CMOS PA is designed in a cascaded dual-stage configuration comprises a driver amplifier and a main PA. The gate voltage (VGS) of the driver amplifier is tuned to optimize its positive third-order transconductance (gm3) to be canceled with the main PA’s fixed negative gm3. The gm3 cancellation between these stages mitigates the third-order intermodulation product (IMD3) that contributes to enhanced linearity. Findings For driver’s VGS of 0.82 V with continuous wave signal, the proposed PA achieved a power gain of 14.5 dB with a peak PAE of 31.8% and a saturated output power of 23.3 dBm at 2.45 GHz. A maximum third-order output intercept point of 34 dBm is achieved at 20.2 dBm output power with a corresponding IMD3 of −33.4 dBc. When tested with a 20 MHz LTE signal, the PA delivers 19 dBm maximum linear output power for an adjacent channel leakage ratio specification of −30 dBc. Originality/value In this study, a novel cascaded gm3 cancellation technique has been implemented to achieve a maximum linear output power under modulated signals.

scholarly journals Design and Simulation of Near-Terahertz GaN Photoconductive Switches--Operation in the Negative Differential Mobility Regime and Pulse Compression

2021 ◽  
Author(s):  
Shaloo Rakheja ◽  
Kexin Li ◽  
Karen M. Dowling ◽  
Adam Conway ◽  
Lars Voss
Keyword(s):  
Output Power ◽  
High Frequency ◽  
Pulse Compression ◽  
High Electron Mobility Transistors ◽  
Laser Source ◽  
High Electron ◽  
Power Gain ◽  
Differential Mobility ◽  
Photoconductive Switches ◽  
High Frequency Performance

<div> <div> <div> <p>The wide bandgap material, Gallium Nitride (GaN), has emerged as the dominant semiconductor material to implement high-electron mobility transistors (HEMTs) that form the basis of RF electronics. GaN is also an excellent material to realize photoconductive switches (PCSS) whose high-frequency performance could exceed that of RF HEMTs. In this paper, we numerically model the output characteristics of a GaN PCSS as a function of the input electrical and optical bias and the device dimensions. Importantly, we show that operating the GaN PCSS in the regime of negative differential mobility significantly benefits its high-frequency performance by compressing the temporal width of the output current pulse, while also enhancing its peak value. We find that when the optically excited carriers are generated in the middle of the active region, the bandwidth of the device is approximately 600 GHz, while delivering an output power exceeding 800 mW with a power gain greater than 35 dB. The output power increases to 1.5 W, and the power gain exceeds 40 dB with a near-terahertz bandwidth ( ≈ 800 GHz), as the laser source is moved closer to the anode. Finally, we elucidate that under high optical bias with significant electrostatic screening effects, the DC electric field across the device can be boosted to further enhance the performance of the GaN PCSS. </p> </div> </div> </div>

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Premmilaah Gunasegaran ◽  
Jagadheswaran Rajendran ◽  
Selvakumar Mariappan ◽  
Yusman Mohd Yusof ◽  
Zulfiqar Ali Abdul Aziz ◽  
...  
Keyword(s):  
Power Consumption ◽  
Output Power ◽  
Power Amplifier ◽  
Maximum Output Power ◽  
Maximum Output ◽  
Power Gain ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Main Amplifier

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

A broadband 23.1 ∼ 27.2 GHz doherty power amplifier with peak output power of 24.3 dBm

Circuit World ◽  
2019 ◽  
Vol 46 (1) ◽  
pp. 1-5
Author(s):  
Yanfeng Fang ◽  
Yijiang Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Input Power ◽  
Content Type ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Peak Output Power ◽  
Saturated Output Power ◽  
Direct Input ◽  
Matching Techniques

Purpose This paper aims to implement a new high output power fully integrated 23.1 to 27.2 GHz gallium arsenide heterojunction bipolar transistor power amplifier (PA) to meet the stringent linearity requirements of LTE systems. Design/methodology/approach The direct input power dividing technique is used on the chip. Broadband input and output matching techniques are used for broadband Doherty operation. Findings The PA achieves a small-signal gain of 22.8 dB at 25.1 GHz and a saturated output power of 24.3 dBm at 25.1 GHz with a maximum power added efficiency of 31.7%. The PA occupies 1.56 mm2 (including pads) and consumes a maximum current of 79.91 mA from a 9 V supply. Originality/value In this paper, the author proposed a novel direct input dividing technique with broadband matching circuits using a low Q output matching technique, and demonstrated a fully-integrated Doherty PA across frequencies of 23.1∼27.2 GHz for long term evolution-license auxiliary access (LTE-LAA) handset applications.

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