scholarly journals Low-Cost Microbolometer Type Infrared Detectors

Micromachines ◽  
2020 ◽  
Vol 11 (9) ◽  
pp. 800
Author(s):  
Le Yu ◽  
Yaozu Guo ◽  
Haoyu Zhu ◽  
Mingcheng Luo ◽  
Ping Han ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Focal Plane ◽  
Technological Development ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Micro Electro Mechanical System ◽  
Focal Plane Arrays ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Cmos Compatible

The complementary metal oxide semiconductor (CMOS) microbolometer technology provides a low-cost approach for the long-wave infrared (LWIR) imaging applications. The fabrication of the CMOS-compatible microbolometer infrared focal plane arrays (IRFPAs) is based on the combination of the standard CMOS process and simple post-CMOS micro-electro-mechanical system (MEMS) process. With the technological development, the performance of the commercialized CMOS-compatible microbolometers shows only a small gap with that of the mainstream ones. This paper reviews the basics and recent advances of the CMOS-compatible microbolometer IRFPAs in the aspects of the pixel structure, the read-out integrated circuit (ROIC), the focal plane array, and the vacuum packaging.

scholarly journals Monolithic optoelectronic integrated broadband optical receiver with graphene photodetectors

Nanophotonics ◽  
2017 ◽  
Vol 6 (6) ◽  
pp. 1343-1352 ◽  
Author(s):  
Chuantong Cheng ◽  
Beiju Huang ◽  
Xurui Mao ◽  
Zanyun Zhang ◽  
Zan Zhang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Low Cost ◽  
Three Dimensional ◽  
Complementary Metal Oxide Semiconductor ◽  
Optical Signal ◽  
Optical Interconnect ◽  
Optical Receiver ◽  
Oxide Semiconductor ◽  
Experimental Realization ◽  
Operation Speed

AbstractOptical receivers with potentially high operation bandwidth and low cost have received considerable interest due to rapidly growing data traffic and potential Tb/s optical interconnect requirements. Experimental realization of 65 GHz optical signal detection and 262 GHz intrinsic operation speed reveals the significance role of graphene photodetectors (PDs) in optical interconnect domains. In this work, a novel complementary metal oxide semiconductor post-backend process has been developed for integrating graphene PDs onto silicon integrated circuit chips. A prototype monolithic optoelectronic integrated optical receiver has been successfully demonstrated for the first time. Moreover, this is a firstly reported broadband optical receiver benefiting from natural broadband light absorption features of graphene material. This work is a perfect exhibition of the concept of monolithic optoelectronic integration and will pave way to monolithically integrated graphene optoelectronic devices with silicon ICs for three-dimensional optoelectronic integrated circuit chips.

scholarly journals A Smart Floating Gate Transistor with Two Control Gates for Active Noise Control

Micromachines ◽  
2019 ◽  
Vol 10 (11) ◽  
pp. 722
Author(s):  
Mao ◽  
Yang ◽  
Ma ◽  
Yan ◽  
Zhang
Keyword(s):  
Large Scale ◽  
Noise Control ◽  
Low Cost ◽  
Active Noise Control ◽  
Complementary Metal Oxide Semiconductor ◽  
Floating Gate ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Active Noise ◽  
Floating Gate Transistor

A smart floating gate transistor with two control gates was proposed for active noise control in bioelectrical signal measurement. The device, which is low cost and capable of large-scale integration, was implemented in a standard single-poly complementary metal–oxide–semiconductor (CMOS) process. A model of the device was developed to demonstrate the working principle. Theoretical analysis and simulation results proved the superposition of the two control gates. A series of test experiments were carried out and the results showed that the device was in accordance with the basic electrical characteristics of a floating gate transistor, including the current–voltage (I–V) characteristics and the threshold characteristics observed on the two control gates. Based on the source follower circuit, the experimental results proved that the device can reduce interference by more than 29 dB, which demonstrates the feasibility of the proposed device for active noise control.

scholarly journals Fully Differential Chopper-Stabilized Multipath Current-Feedback Instrumentation Amplifier with R-2R DAC Offset Adjustment for Resistive Bridge Sensors

2019 ◽  
Vol 10 (1) ◽  
pp. 63 ◽  
Author(s):  
Yongsu Kwon ◽  
Hyungseup Kim ◽  
Jaesung Kim ◽  
Kwonsang Han ◽  
Donggeun You ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Instrumentation Amplifier ◽  
Cmos Process ◽  
Current Feedback ◽  
Readout Integrated Circuit ◽  
Fully Differential ◽  
Chopper Stabilization ◽  
Rejection Ratio

A fully differential multipath current-feedback instrumentation amplifier (CFIA) for a resistive bridge sensor readout integrated circuit (IC) is proposed. To reduce the CFIA’s own offset and 1/f noise, a chopper stabilization technique is implemented. To attenuate the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. A multipath architecture is implemented to compensate for the notch in the chopping frequency band of the transfer function. To prevent performance degradation resulting from external offset, a 12-bit R-2R digital-to-analog converter (DAC) is employed. The proposed CFIA has an adjustable gain of 16–44 dB with 5-bit programmable resistors. The proposed resistive sensor readout IC is implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. The CFIA draws 169 μA currents from a 3.3 V supply. The simulated input-referred noise and noise efficiency factor (NEF) are 28.3 nV/√Hz and 14.2, respectively. The simulated common-mode rejection ratio (CMRR) is 162 dB, and the power supply rejection ratio (PSRR) is 112 dB.

A High Uniformity Readout Integrated Circuit for Infrared Focal Plane Array Applications

2014 ◽  
Vol 602-605 ◽  
pp. 2632-2636
Author(s):  
Tong Zhou ◽  
Tao Dong ◽  
Yan Su ◽  
Yong He
Keyword(s):  
Integrated Circuit ◽  
Focal Plane ◽  
Infrared Image ◽  
Low Frequency ◽  
Low Noise ◽  
Focal Plane Arrays ◽  
Cmos Process ◽  
Readout Integrated Circuit ◽  
Practical Applications ◽  
High Uniformity

Infrared focal plane arrays (IRFPA) suffer from inherent low frequency and fixed patter noise (FPN). To achieve high quality infrared image by mitigating the FPN of IRFPAs, a novel low-noise and high uniformity readout integrated circuit (ROIC) has been proposed. A correlated double sampling (CDS) with single capacitor method has been adopted in the ROIC design which can effectively reduce the FPN, KTC and 1/f noise. A 4×4 experimental readout chip has been designed and fabricated using the SMIC 0.18 μm CMOS process. Both the function and performance of the proposed readout circuit have been verified by experimental results. The test results show that the proposed ROIC has a good performance in practical applications.

Fabrication of microbridges in standard complementary metal oxide semiconductor technology

1989 ◽  
Vol 67 (4) ◽  
pp. 184-189 ◽  
Author(s):  
M. Parameswaran ◽  
Lj. Ristic ◽  
A. C. Dhaded ◽  
H. P. Baltes ◽  
W. Allegretto ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Integrated Circuit ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Layout Design ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Digital Cmos ◽  
Sensor Applications

Complementary metal oxide semiconductor (CMOS) technology is one of the leading fabrication technologies of the semiconductor integrated-circuit industry. We have discovered features inherent in the standard CMOS fabrication process that lend themselves to the manufacturing of micromechanical structures for sensor applications. In this paper we present an unconventional layout design methodology that allows us to exploit the standard CMOS process for producing microbridges. Two types of microbridges, bare polysilicon microbridges and sandwiched oxide microbridges, have been manufactured by first implementing a special layout design in an industrial digital CMOS process, followed by a postprocessing etching step.

Vertical Arrays of Copper Nanotube Grown on Silicon Substrate by CMOS Compatible Electrochemical Process for IC Packaging Applications

2009 ◽  
Vol 6 (3) ◽  
pp. 154-157
Author(s):  
Daniel Choi ◽  
Viola Fucsko ◽  
E. H. Yang ◽  
Jung-Rae Park ◽  
Fahad Khalid ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Integrated Circuit ◽  
High Surface ◽  
Complementary Metal Oxide Semiconductor ◽  
Electrochemical Process ◽  
Oxide Semiconductor ◽  
Cu Nanowires ◽  
Vertical Arrays ◽  
Ic Packaging ◽  
Cmos Compatible

We present an electrodeposition-based fabrication process which can be complementary metal oxide semiconductor (CMOS) compatible for creating vertical arrays of copper (Cu) nanotubes for integrated circuit (IC) packaging applications. Since such nanotube structures offer high surface-to-volume ratios, low resistivity, and high thermal conductivity, they are especially suited for IC packaging applications requiring efficient heat transfer as well as electrical interconnect applications. In this work, Cu nanotube arrays were electrodeposited into alumina nanopore templates with pore diameters of approximately 50 nm and 100 nm. Simulation and measurements of the vertical arrays of Cu nanotubes showed greatly enhanced thermal conductivity in the direction of nanotube alignment compared with Cu nanowires and bulk Cu. The thermal conductivity of the vertical arrays of Cu nanotubes at 100°C is about 0.35W/m · K compared to the 0.24 W/m · K from Cu bulk materials, which shows an enhancement of about 146% as a result of the more efficient thermal conduction in Cu nanotubes.

Output Voltage Sampling Circuit for Discontinuous Conduction Mode Flyback Pulse-Width Modulation Controller

2016 ◽  
Vol 25 (11) ◽  
pp. 1650140 ◽  
Author(s):  
Ling-Feng Shi ◽  
Zhen-Bo Shi ◽  
Sen Chen ◽  
Jian-Hui Xun
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Discharge Time ◽  
Constant Output

Primary-side controlled pulse-width modulation (PWM) flyback converter has been widely used in low-power and low-voltage products for its simple structure and low cost. This paper presents a novel output voltage sampling circuit which considers the influence of the rectifier diode current on the output voltage sampling. The output voltage sampling circuit samples the output voltage at 85% of the secondary inductance discharge time [Formula: see text] of last cycle, which improves the accuracy of the output voltage sampling circuit. Besides, the circuit can also sample the secondary inductance discharge time [Formula: see text]. Finally, a chip has been fabricated in 0.6[Formula: see text][Formula: see text]m complementary metal-oxide semiconductor (CMOS) process, which is used in the presented output voltage sampling circuit in its internal circuit to simple output voltage and achieve constant output voltage.

scholarly journals Monolithically-Integrated Single-Photon Avalanche Diode in a Zero-Change Standard CMOS Process for Low-Cost and Low-Voltage LiDAR Application

Instruments ◽  
2019 ◽  
Vol 3 (2) ◽  
pp. 33
Author(s):  
Jinsoo Rhim ◽  
Xiaoge Zeng ◽  
Zhihong Huang ◽  
Sai Rahul Chalamalasetti ◽  
Marco Fiorentino ◽  
...  
Keyword(s):  
Low Voltage ◽  
Single Photon ◽  
Low Cost ◽  
Minimum Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Complete Characterization ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Avalanche Diode ◽  
Monolithically Integrated

We present a single-photon sensor based on the single-photon avalanche diode (SPAD) that is suitable for low-cost and low-voltage light detection and ranging (LiDAR) applications. It is implemented in a zero-change standard 0.18-μm complementary metal oxide semiconductor process at the minimum cost by excluding any additional processing step for customized doping profiles. The SPAD is based on circular shaped P+/N-well junction of 8-μm diameter, and it achieves low breakdown voltage below 10 V so that the operation voltage of the single-photon sensor can be minimized. The quenching and reset circuit is integrated monolithically to capture photon-generated output pulses for measurement. A complete characterization of our single-photon sensor is provided.

scholarly journals A 0.35-μm CMOS-MEMS Oscillator for High-Resolution Distributed Mass Detection

Micromachines ◽  
2018 ◽  
Vol 9 (10) ◽  
pp. 484 ◽  
Author(s):  
Rafel Perelló-Roig ◽  
Jaume Verd ◽  
Joan Barceló ◽  
Sebastià Bota ◽  
Jaume Segura
Keyword(s):  
Low Cost ◽  
Electrical Characterization ◽  
Complementary Metal Oxide Semiconductor ◽  
Turnaround Time ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Mass Detection ◽  
Electrostatically Actuated ◽  
Resonator Structure ◽  
Cmos Mems

This paper presents the design, fabrication, and electrical characterization of an electrostatically actuated and capacitive sensed 2-MHz plate resonator structure that exhibits a predicted mass sensitivity of ~250 pg·cm−2·Hz−1. The resonator is embedded in a fully on-chip Pierce oscillator scheme, thus obtaining a quasi-digital output sensor with a short-term frequency stability of 1.2 Hz (0.63 ppm) in air conditions, corresponding to an equivalent mass noise floor as low as 300 pg·cm−2. The monolithic CMOS-MEMS sensor device is fabricated using a commercial 0.35-μm 2-poly-4-metal complementary metal-oxide-semiconductor (CMOS) process, thus featuring low cost, batch production, fast turnaround time, and an easy platform for prototyping distributed mass sensors with unprecedented mass resolution for this kind of devices.

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