scholarly journals Numerical Simulation Analysis of Switching Characteristics in the Source-Trench MOSFET’s

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1895
Author(s):  
Jinhee Cheon ◽  
Kwangsoo Kim
Keyword(s):  
High Frequency ◽  
Power Loss ◽  
Figure Of Merit ◽  
Simulation Analysis ◽  
Source Region ◽  
Switching Speed ◽  
Reverse Transfer ◽  
Input Capacitance ◽  
Tcad Simulation ◽  
Switching Characteristics

In this paper, we compare the static and switching characteristics of the 4H-SiC conventional UMOSFET (C-UMOSFET), double trench MOSFET (DT-MOSFET) and source trench MOSFET (ST-MOSFET) through TCAD simulation. In particular, the effect of the trenched source region and the gate trench bottom P+ shielding region on the capacitance is analyzed, and the dynamic characteristics of the three structures are compared. The input capacitance is almost identical in all three structures. On the other hand, the reverse transfer capacitance of DT-MOSFET and ST-MOSFET is reduced by 44% and 24%, respectively, compared to C-UMOSFET. Since the reverse transfer capacitance of DT-MOSFET and ST-MOSFET is superior to that of C-UMOSFET, it improves high frequency figure of merit (HF-FOM: RON-SP × QGD). The HF-FOM of DT-MOSFET and ST-MOSFET is 289 mΩ∙nC, 224 mΩ∙nC, respectively, which is improved by 26% and 42% compared to C-UMOSFET. The switching speed of DT-MOSFET and ST-MOSFET are maintained at the same level as the C-UMOSFET. The switching energy loss and power loss of the DT-MOSFET and ST-MOSFET are slightly improved compared to C-UMOSFET.

scholarly journals A 1.2 kV SiC MOSFET with Integrated Heterojunction Diode and P-shield Region

Energies ◽  
2021 ◽  
Vol 14 (24) ◽  
pp. 8582
Author(s):  
Jongwoon Yoon ◽  
Jaeyeop Na ◽  
Kwangsoo Kim
Keyword(s):  
Electric Field ◽  
Energy Loss ◽  
High Frequency ◽  
Recovery Time ◽  
Figure Of Merit ◽  
Heterojunction Diode ◽  
Static And Dynamic Characteristics ◽  
Gate Structure ◽  
Tcad Simulation ◽  
Reverse Recovery Time

A 1.2 kV SiC MOSFET with an integrated heterojunction diode and p-shield region (IHP-MOSFET) was proposed and compared to a conventional SiC MOSFET (C-MOSFET) using numerical TCAD simulation. Due to the heterojunction diode (HJD) located at the mesa region, the reverse recovery time and reverse recovery charge of the IHP-MOSFET decreased by 62.5% and 85.7%, respectively. In addition, a high breakdown voltage (BV) and low maximum oxide electric field (EMOX) could be achieved in the IHP-MOSFET by introducing a p-shield region (PSR) that effectively disperses the electric field in the off-state. The proposed device also exhibited 3.9 times lower gate-to-drain capacitance (CGD) than the C-MOSFET due to the split-gate structure and grounded PSR. As a result, the IHP-MOSFET had electrically excellent static and dynamic characteristics, and the Baliga’s figure of merit (BFOM) and high frequency figure of merit (HFFOM) were increased by 37.1% and 72.3%, respectively. Finally, the switching energy loss was decreased by 59.5% compared to the C-MOSFET.

scholarly journals RF/Analog and Linearity Performance Evaluation of Lattice-Matched ultra-thin AlGaN/GaN Gate Recessed MOSHEMT with Silicon Substrate

2021 ◽  
Author(s):  
Abdul Naim Khan ◽  
KANJALOCHAN JENA ◽  
Soumya Ranjan Routray ◽  
Gaurav Chatterjee
Keyword(s):  
High Frequency ◽  
Figure Of Merit ◽  
Superior Performance ◽  
Si Substrate ◽  
Gan Hemt ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Tcad Simulation ◽  
High Transconductance ◽  
Lattice Matched

Abstract In this article, the Authors have demonstrated and analyzed various analog/RF and linearity performance of a AlGaN/GaN gate recessed MOSHEMT (GR-MOSHEMT) grown on a Si substrate with mathematical modeling based TCAD simulation. Specifically, a Al2O3 dielectric GR-MOSHEMT has shown tremendous potential in terms of AC/DC figure of merits (FOM’s) such as low leakage current, high transconductance, high Ion/Ioff current ratio and excellent linear properties corresponding to conventional AlGaN/GaN HEMT and MOSHEMT. The figure-of-merit metrics such as VIP2, VIP3, IIP3 and IDM3 are performed for different drain to source voltages (VDS) of 2.5V, 5V and 10V. All the modeling and simulation results are generated by Commercial Silvaco TCAD and found to be satisfactory in terms of high frequency and power applications. The present GR-MOSHEMT device shows a superior performance with a threshold voltage of 0.5V, Current density of 888 mA, high transconductance of 225 mS/mm and high unit gain cut-off frequency of 0.91GHz. The results of the developed AlGaN/GaN GR-MOSHEMT considerably improves the device performance and also suitable for high power distortion less RF applications.

1.2 kV SiC Trench-Gate MOSFETs with Dual Shielding Regions

2019 ◽  
Vol 963 ◽  
pp. 600-604 ◽  
Author(s):  
Aditi Agarwal ◽  
Ki Jeong Han ◽  
B. Jayant Baliga
Keyword(s):  
Numerical Simulations ◽  
Breakdown Voltage ◽  
High Frequency ◽  
Figure Of Merit ◽  
Reverse Transfer ◽  
High Breakdown Voltage

This paper presents a study of the 1.2kV UMOSFETs with dual shielding regions. Numerical simulations demonstrate the importance of including dual shielding regions to achieve low specific on-resistance and high breakdown voltage. The optimized structure has a low specific on-resistance (Ron,sp) of 2.19 mΩ-cm2, high breakdown voltage of 1470 V, low specific reverse transfer capacitance (Cgd,sp) of 17 pF/cm2 and excellent high-frequency figure-of-merit (HF-FOM) of 37 fs.

High-performance SiC MOSFET embedded heterojunction diode with electric field protection region

2021 ◽  
Author(s):  
Jongwoon Yoon ◽  
Kwangsoo Kim
Keyword(s):  
Electric Field ◽  
High Frequency ◽  
High Performance ◽  
Figure Of Merit ◽  
High Reliability ◽  
Side Wall ◽  
Heterojunction Diode ◽  
Static Performance ◽  
Simulation Results ◽  
Tcad Simulation

Abstract In this study, we proposed high-performance SiC MOSFET embedded heterojunction diode (HJD) with an electric field protection (EFP) region and analyzed it using a Sentaurus TCAD simulation. The proposed device features an HJD positioned at the trench side wall in the middle of the JFET region and a highly doped EFP region under the P+ polysilicon to features excellent static performance and high reliability. The simulation results revealed that the maximum oxide electric field (EMOX) and the Baliga’s figure-of-merit (BFOM) improved by 54% and 12%, respectively, compared with those of conventional SiC MOSFETs (C-MOSFETs). In addition, the EFP region suppressed the DIBL effect and leakage current in the HJD interface sufficiently. The HJD suppressed the bipolar degradation of the PiN body diode effectively due to its low VF (1.75 V). In addition, the proposed device demonstrated superior reverse-recovery characteristics, thereby improving trr and Qrr by 35% and 57%, respectively, compared to the corresponding values in C-MOSFET. Moreover, the input capacitance (CISS) was reduced by 17.5%, and CGD was reduced by 96%. Therefore, the high-frequency figure-of-merit (HFOM) improved by a factor of 25.8 in terms of RON × CGD. As a result, the proposed device is a promising structure for high-frequency and high-reliability applications.

scholarly journals Analysis of Electrical Characteristics in 4H-SiC Trench-Gate MOSFETs with Grounded Bottom Protection p-Well Using Analytical Modeling

2021 ◽  
Vol 11 (24) ◽  
pp. 12075
Author(s):  
Jee-Hun Jeong ◽  
Ogyun Seok ◽  
Ho-Jun Lee
Keyword(s):  
Analytical Model ◽  
Computer Aided Design ◽  
Analytical Modeling ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Reverse Transfer ◽  
Tcad Simulation ◽  
Switching Characteristics ◽  
Aided Design

A new analytical model to analyze and optimize the electrical characteristics of 4H-SiC trench-gate metal-oxide-semiconductor field-effect transistors (TMOSFETs) with a grounded bottom protection p-well (BPW) was proposed. The optimal BPW doping concentration (NBPW) was extracted by analytical modeling and a numerical technology computer-aided design (TCAD) simulation, in order to analyze the breakdown mechanisms for SiC TMOSFETs using BPW, while considering the electric field distribution at the edge of the trench gate. Our results showed that the optimal NBPW obtained by analytical modeling was almost identical to the simulation results. In addition, the reverse transfer capacitance (Cgd) values obtained from the analytical model correspond with the results of the TCAD simulation by approximately 86%; therefore, this model can predict the switching characteristics of the effect BPW regions.

scholarly journals Simulation-Based Power-Loss Optimization of General-Purpose High-Voltage SiC MOSFET Circuit Under High-Frequency Operation

IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 23786-23794
Author(s):  
Abhishek Kar ◽  
Mitiko Miura-Mattausch ◽  
Mainak Sengupta ◽  
Dondee Navaroo ◽  
Hideyuki Kikuchihara ◽  
...  
Keyword(s):  
High Voltage ◽  
High Frequency ◽  
Power Loss ◽  
General Purpose ◽  
Simulation Based ◽  
High Frequency Operation

scholarly journals Parasitic Loop Inductances Reduction in the PCB Layout in GaN-Based Power Converters Using S-Parameters and EM Simulations

Energies ◽  
2021 ◽  
Vol 14 (5) ◽  
pp. 1495
Author(s):  
Loris Pace ◽  
Nadir Idir ◽  
Thierry Duquesne ◽  
Jean-Claude De Jaeger
Keyword(s):  
High Frequency ◽  
Printed Circuit Board ◽  
Power Converters ◽  
Calibration Procedure ◽  
Circuit Board ◽  
Design System ◽  
Switching Speed ◽  
Parasitic Inductance ◽  
Frequency Converters ◽  
S Parameters

Due to the high switching speed of Gallium Nitride (GaN) transistors, parasitic inductances have significant impacts on power losses and electromagnetic interferences (EMI) in GaN-based power converters. Thus, the proper design of high-frequency converters in a simulation tool requires accurate electromagnetic (EM) modeling of the commutation loops. This work proposes an EM modeling of the parasitic inductance of a GaN-based commutation cell on a printed circuit board (PCB) using Advanced Design System (ADS®) software. Two different PCB designs of the commutation loop, lateral (single-sided) and vertical (double-sided) are characterized in terms of parasitic inductance contribution. An experimental approach based on S-parameters, the Cold FET technique and a specific calibration procedure is developed to obtain reference values for comparison with the proposed models. First, lateral and vertical PCB loop inductances are extracted. Then, the whole commutation loop inductances including the packaging of the GaN transistors are determined by developing an EM model of the device’s internal parasitic. The switching waveforms of the GaN transistors in a 1 MHz DC/DC converter are given for the different commutation loop designs. Finally, a discussion is proposed on the presented results and the development of advanced tools for high-frequency GaN-based power electronics design.

scholarly journals 4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics

Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3554
Author(s):  
Jaeyeop Na ◽  
Jinhee Cheon ◽  
Kwangsoo Kim
Keyword(s):  
Dynamic Characteristics ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Switching Loss ◽  
Switching Speed ◽  
Polysilicon Gate ◽  
Effect Transistor ◽  
Switching Characteristics

In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.

On High Frequency Power Loss of Dielectrics

1951 ◽  
Vol 6 (4) ◽  
pp. 280-281 ◽  
Author(s):  
Ken'iti Higasi ◽  
Yasutomo Ozawa
Keyword(s):  
High Frequency ◽  
Power Loss ◽  
High Frequency Power ◽  
Frequency Power
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