scholarly journals Creation and Detection of Hardware Trojans Using Non-Invasive Off-The-Shelf Technologies

Electronics ◽  
2018 ◽  
Vol 7 (7) ◽  
pp. 124 ◽  
Author(s):  
Catherine Rooney ◽  
Amar Seeam ◽  
Xavier Bellekens
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Test Time ◽  
Detection Accuracy ◽  
Sensitive Information ◽  
Hardware Trojan ◽  
Hardware Trojans ◽  
Non Invasive ◽  
Channel Analysis ◽  
Open Source Hardware

As a result of the globalisation of the semiconductor design and fabrication processes, integrated circuits are becoming increasingly vulnerable to malicious attacks. The most concerning threats are hardware trojans. A hardware trojan is a malicious inclusion or alteration to the existing design of an integrated circuit, with the possible effects ranging from leakage of sensitive information to the complete destruction of the integrated circuit itself. While the majority of existing detection schemes focus on test-time, they all require expensive methodologies to detect hardware trojans. Off-the-shelf approaches have often been overlooked due to limited hardware resources and detection accuracy. With the advances in technologies and the democratisation of open-source hardware, however, these tools enable the detection of hardware trojans at reduced costs during or after production. In this manuscript, a hardware trojan is created and emulated on a consumer FPGA board. The experiments to detect the trojan in a dormant and active state are made using off-the-shelf technologies taking advantage of different techniques such as Power Analysis Reports, Side Channel Analysis and Thermal Measurements. Furthermore, multiple attempts to detect the trojan are demonstrated and benchmarked. Our simulations result in a state-of-the-art methodology to accurately detect the trojan in both dormant and active states using off-the-shelf hardware.

Hardware Trojan Detection Technique Using Frequency Characteristic Analysis of Path Delay in Application Specific Integrated Circuits

2020 ◽  
Vol 10 (2) ◽  
pp. 36-43
Author(s):  
Ha Thai Tran ◽  
Phuc Van Hoang ◽  
Tuan Ngoc Do ◽  
Duong Hai Nguyen
Keyword(s):  
Integrated Circuits ◽  
Frequency Characteristic ◽  
Integrated Circuit ◽  
Hardware Security ◽  
Hardware Trojan ◽  
Path Delay ◽  
Characteristic Analysis ◽  
Hardware Trojan Detection ◽  
Ic Manufacturing ◽  
Application Specific

 Abstract—  Since the last decade, hardware Trojan (HT) have become a serious problem for hardware security because of outsourcing trends in Integrated Circuit (IC) manufacturing. As the fabrication of IC is becoming very complex and costly, more and more chipmakers outsource their designs or parts of the fabrication process. This trend opens a loophole in hardware security, as an untrusted company could perform malicious modifications to the golden circuit at design or fabrication stages. Therefore, assessing risks and proposing solutions to detect HT are very important tasks. This paper presents a technique for detecting HT using frequency characteristic analysis of path delay. The results show that measuring with the frequency step of 0.016 MHz can detect a HT having the size of 0.2% of the original design.Tóm tắt— Từ thập niên 2010, Trojan phần cứng (HT) đã trở thành một vấn đề nghiêm trọng đối với bảo mật phần cứng, do xu hướng thuê sản xuất mạch tích hợp (Integrated Circuit - IC). Khi quá trình chế tạo IC trở nên phức tạp và tốn kém, ngày càng nhiều nhà sản xuất chip lựa chọn phương án thuê lại một phần hoặc toàn bộ thiết kế IC. Xu hướng này tạo ra lỗ hổng trong bảo mật phần cứng, vì một công ty không đáng tin cậy có thể thực hiện các sửa đổi độc hại vào trong mạch nguyên bản ở giai đoạn thiết kế hoặc chế tạo. Do đó, đánh giá rủi ro và đề xuất giải pháp phát hiện HT là một trong những nhiệm vụ hết sức quan trọng. Bài báo này trình bày một giải pháp phát hiện HT sử dụng phân tích đặc tính tần số của độ trễ đường truyền tín hiệu. Kết quả cho thấy, thực hiện khảo sát với bước tần số 0,016 MHz có thể phát hiện được HT có kích thước 0,2% so với thiết kế ban đầu. 

scholarly journals Think Smart, Play Dumb: Analyzing Deception in Hardware Trojan Detection Using Game Theory

2020 ◽  
Author(s):  
Tapadhir Das
Keyword(s):  
Integrated Circuits ◽  
Repeated Game ◽  
Third Party ◽  
Hardware Trojan ◽  
Hardware Trojans ◽  
Learning Stage ◽  
Hardware Trojan Detection ◽  
Trojan Detection ◽  
Utility Gain ◽  
Game Theoretic

In recent years, integrated circuits (ICs) have become<br>significant for various industries and their security has<br>been given greater priority, specifically in the supply chain.<br>Budgetary constraints have compelled IC designers to offshore manufacturing to third-party companies. When the designer gets the manufactured ICs back, it is imperative to test for potential threats like hardware trojans (HT). In this paper, a novel multilevel game-theoretic framework is introduced to analyze the interactions between a malicious IC manufacturer and the tester. In particular, the game is formulated as a non-cooperative, zerosum, repeated game using prospect theory (PT) that captures different players’ rationalities under uncertainty. The repeated game is separated into a learning stage, in which the defender<br><div>learns about the attacker’s tendencies, and an actual game stage, where this learning is used. Experiments show great incentive for the attacker to deceive the defender about their actual rationality by “playing dumb” in the learning stage (deception). This scenario is captured using hypergame theory to model the attacker’s view of the game. The optimal deception rationality of the attacker is analytically derived to maximize utility gain. For the defender, a first-step deception mitigation process is proposed to thwart the effects of deception. Simulation results show that the attacker can profit from the deception as it can successfully insert HTs in the manufactured ICs without being detected.</div><div><br></div><div>This paper has been accepted for publication in <b>IEEE Cyber Science Conference 2020</b><br></div>

scholarly journals Classification overview of the Hardware Trojans in digital circuits

2020 ◽  
Vol 43 (3) ◽  
pp. 12-15
Author(s):  
Grigore Mihai Timis ◽  
Alexandru Valachi
Keyword(s):  
Integrated Circuit ◽  
Digital Circuits ◽  
Denial Of Service ◽  
Hardware Trojan ◽  
Classification Methods ◽  
Confidential Information ◽  
Hardware Trojans ◽  
Secret Keys

This paper presents an overview of the Hardware Trojans classification methods. A malicious entity can introduce a Hardware Trojan (HT) into a design in order to denial of service, destroy or disable the system. Moreover, it could leak the confidential information and the secret keys before altered them. The Hardware Trojan (HT) threats should be analyzed with maximum importance through the entire lifecycle of the integrated circuit (ICs). A hardware protection against the detected harmful logic should also be implemented.

Hardware Trojan Horse Detection through Improved Switching of Dormant Nets

2021 ◽  
Vol 17 (3) ◽  
pp. 1-22
Author(s):  
Tapobrata Dhar ◽  
Surajit Kumar Roy ◽  
Chandan Giri
Keyword(s):  
Integrated Circuits ◽  
Manufacturing Process ◽  
Test Phase ◽  
Side Channel ◽  
Hardware Trojan ◽  
Side Channel Analysis ◽  
Area Overhead ◽  
Channel Analysis ◽  
Testability Measures ◽  
Simulation Results

Covert Hardware Trojan Horses (HTH) introduced by malicious attackers during the fabless manufacturing process of integrated circuits (IC) have the potential to cause malignant functions within the circuit. This article employs a Design-for-Security technique to detect any HTHs present in the circuit by inserting tri-state buffers (TSB) in the ICs that inject the internal nets with weighted logic values during the test phase. This increases the transitions in the logic values of the nets within the IC, thereby stimulating any inserted HTH circuits. The TSBs are efficiently inserted in the IC considering various circuit parameters and testability measures to bolster the transitions in logic values of the nets throughout the IC while minimising the area overhead. Simulation results show a significant increase in transitions in logic values within HTH triggers using this method, thus aiding in their detection through side-channel analysis or direct activation of the payload.

scholarly journals Covert Gates: Protecting Integrated Circuits with Undetectable Camouflaging

2019 ◽  
pp. 86-118
Author(s):  
Bicky Shakya ◽  
Haoting Shen ◽  
Mark Tehranipoor ◽  
Domenic Forte
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Boolean Functions ◽  
Imaging Techniques ◽  
Security Analysis ◽  
Vlsi Testing ◽  
Non Invasive ◽  
Standard Cells ◽  
High Area ◽  
Promising Solution

Integrated circuit (IC) camouflaging has emerged as a promising solution for protecting semiconductor intellectual property (IP) against reverse engineering. Existing methods of camouflaging are based on standard cells that can assume one of many Boolean functions, either through variation of transistor threshold voltage or contact configurations. Unfortunately, such methods lead to high area, delay and power overheads, and are vulnerable to invasive as well as non-invasive attacks based on Boolean satisfiability/VLSI testing. In this paper, we propose, fabricate, and demonstrate a new cell camouflaging strategy, termed as ‘covert gate’ that leverages doping and dummy contacts to create camouflaged cells that are indistinguishable from regular standard cells under modern imaging techniques. We perform a comprehensive security analysis of covert gate, and show that it achieves high resiliency against SAT and test-based attacks at very low overheads. We also derive models to characterize the covert cells, and develop measures to incorporate them into a gate-level design. Simulation results of overheads and attacks are presented on benchmark circuits.

A Non-Invasive Hardware Trojan Detection Approach Based on Side-Channel Analysis

2013 ◽  
Vol 401-403 ◽  
pp. 1776-1780
Author(s):  
Xu Xu ◽  
Xiong Wei Li ◽  
Yang Zhang ◽  
Fang Fang Xie
Keyword(s):  
Side Channel ◽  
Hardware Trojan ◽  
Non Invasive ◽  
Hardware Trojan Detection ◽  
Trojan Detection ◽  
Detection Approach ◽  
Characteristic Signal ◽  
Channel Analysis ◽  
The Difference ◽  
Karhunen Loeve Transform

Aim at the feasibility of using electromagnetic emanation side-channel to detect hardware Trojan in IC chips, the structure of EM side-channel signal of chip is analyzed and the leaked model about signal is designed. With explaining the principle of Karhunen-Loeve transform, a method that uses KL transform to obtain characteristic signal of EM emanation side-channel is introduced. It detects hardware Trojan by analyzing the difference between the characteristic signal of chip with and without Trojan. Experiments of detecting hardware Trojan in FPGA cipher chip show that we can distinguish effectively the difference between the EM signals of Trojan chip and genuine chip, then the Trojan in chip can be detected.

scholarly journals Think Smart, Play Dumb: Analyzing Deception in Hardware Trojan Detection Using Game Theory

2020 ◽  
Author(s):  
Tapadhir Das ◽  
AbdelRahman Eldosouky ◽  
Shamik Sengupta
Keyword(s):  
Integrated Circuits ◽  
Repeated Game ◽  
Third Party ◽  
Hardware Trojan ◽  
Hardware Trojans ◽  
Learning Stage ◽  
Hardware Trojan Detection ◽  
Trojan Detection ◽  
Utility Gain ◽  
Game Theoretic

In recent years, integrated circuits (ICs) have become<br>significant for various industries and their security has<br>been given greater priority, specifically in the supply chain.<br>Budgetary constraints have compelled IC designers to offshore manufacturing to third-party companies. When the designer gets the manufactured ICs back, it is imperative to test for potential threats like hardware trojans (HT). In this paper, a novel multilevel game-theoretic framework is introduced to analyze the interactions between a malicious IC manufacturer and the tester. In particular, the game is formulated as a non-cooperative, zerosum, repeated game using prospect theory (PT) that captures different players’ rationalities under uncertainty. The repeated game is separated into a learning stage, in which the defender<br><div>learns about the attacker’s tendencies, and an actual game stage, where this learning is used. Experiments show great incentive for the attacker to deceive the defender about their actual rationality by “playing dumb” in the learning stage (deception). This scenario is captured using hypergame theory to model the attacker’s view of the game. The optimal deception rationality of the attacker is analytically derived to maximize utility gain. For the defender, a first-step deception mitigation process is proposed to thwart the effects of deception. Simulation results show that the attacker can profit from the deception as it can successfully insert HTs in the manufactured ICs without being detected.</div><div><br></div><div>This paper has been accepted for publication in <b>IEEE Cyber Science Conference 2020</b><br></div>

Trojan Scanner: Detecting Hardware Trojans with Rapid SEM Imaging Combined with Image Processing and Machine Learning

2018 ◽  
Author(s):  
Nidish Vashistha ◽  
Hangwei Lu ◽  
Qihang Shi ◽  
M Tanjidur Rahman ◽  
Haoting Shen ◽  
...  
Keyword(s):  
Machine Learning ◽  
Integrated Circuits ◽  
Reverse Engineering ◽  
Physical Structure ◽  
Supervised Machine Learning ◽  
Hardware Trojan ◽  
Hardware Trojans ◽  
Sem Images ◽  
Sem Image ◽  
Machine Learning Model

Abstract Hardware Trojans are malicious changes to the design of integrated circuits (ICs) at different stages of the design and fabrication processes. Different approaches have been developed to detect Trojans namely non-destructive (electrical tests like run-time monitoring, functional and structural tests) and destructive (full chip reverse engineering). However, these methods cannot detect all types of Trojans and they suffer from a number of disadvantages such as slow speed of detection and lack of confidence in detecting all types of Trojans. Majority of hardware Trojans implemented in an IC will leave a footprint at the doping (active) layer. In this paper, we introduce a new version of our previously developed “Trojan Scanner” [1] framework for the untrusted foundry threat model, where a trusted GDSII layout (golden layout) is available. Advanced computer vision algorithms in combination with the supervised machine-learning model are used to classify different features of the golden layout and SEM images from an IC under authentication, as a unique descriptor for each type of gates. These descriptors are compared with each other to detect any subtle changes on the active region, which can raise the flag for the existence of a potential hardware Trojan. The descriptors can differentiate variation due to fabrication process, defects, and common SEM image distortions to rule out the possibility of false detection. Our results demonstrate that Trojan Scanner is more reliable than electrical testing and faster than full chip reverse engineering. Trojan Scanner does not rely on the functionality of the circuit rather focuses on the real physical structure to detect malicious changes inserted by the untrusted foundry.

A Side-Channel Analysis for Hardware Trojan Detection Based on Path Delay Measurement

2018 ◽  
Vol 27 (09) ◽  
pp. 1850138 ◽  
Author(s):  
Atieh Amelian ◽  
Shahram Etemadi Borujeni
Keyword(s):  
Integrated Circuit ◽  
Side Channel ◽  
Hardware Trojan ◽  
Path Delay ◽  
Side Channel Analysis ◽  
Hardware Trojan Detection ◽  
Trojan Detection ◽  
Delay Measurement ◽  
Channel Analysis ◽  
Circuit Function

Hardware Trojan Horses (HTHs) are malicious modifications inserted in Integrated Circuit during fabrication steps. The HTHs are very small and can cause damages in circuit function. They cannot be detected by conventional testing methods. Due to dangerous effects of them, Hardware Trojan Detection has become a major concern in hardware security. In this paper, a new HTH detection method is presented based on side-channel analysis that uses path delay measurement. In this method, we find and observe the paths that Trojans have most effect on them. Most of the previous works add some structures to the circuit and need a large overhead cost. But, in our method, there is no modification in the circuit and we can use it for testing the circuits received after fabrication. The proposed method is evaluated with Xilinx FPGA over a number of test circuits. The results show that measuring the delays on 20 paths with an accuracy of 0.01[Formula: see text]ns can detect more than 80% of Trojans.

A Method of Detecting Hardware Trojans Based on Side-Channel Analysis

2014 ◽  
Vol 536-537 ◽  
pp. 558-561
Author(s):  
Wen Feng Feng ◽  
Lei Li ◽  
Zhen Li
Keyword(s):  
Integrated Circuits ◽  
Detection Methods ◽  
Side Channel ◽  
Process Noise ◽  
Hardware Trojans ◽  
Side Channel Analysis ◽  
Benchmark Circuit ◽  
Design And Manufacturing ◽  
Channel Analysis ◽  
Power Delay Product

In recent years, integrated circuits subject to hardware Trojans attack in the design and manufacturing process, the security of chip and hardware security was threatened. Some detection methods of have been proposed, the most common of those methods is based on side-channel signal analysis, however, since the effect of process noise, considering only the unilateral information that is difficult to effectively distinguish the noise and Trojans circuit. In this paper, the method still based on side-channel signal, but it is a combination of power and delay which was called the power-delay product (PDP). The idea proposed is verified by the benchmark circuit iscas85, the experimental results show that this method can effectively improve detection probability.

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