scholarly journals Heteroepitaxial Growth of III-V Semiconductors on Silicon

Crystals ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 1163
Author(s):  
Jae-Seong Park ◽  
Mingchu Tang ◽  
Siming Chen ◽  
Huiyun Liu
Keyword(s):  
Integrated Circuits ◽  
Coefficient Of Thermal Expansion ◽  
Low Cost ◽  
Photonic Integrated Circuits ◽  
Monolithic Integration ◽  
Heteroepitaxial Growth ◽  
Large Area ◽  
Si Substrates ◽  
Potential Benefits ◽  
Future Direction

Monolithic integration of III-V semiconductor devices on Silicon (Si) has long been of great interest in photonic integrated circuits (PICs), as well as traditional integrated circuits (ICs), since it provides enormous potential benefits, including versatile functionality, low-cost, large-area production, and dense integration. However, the material dissimilarity between III-V and Si, such as lattice constant, coefficient of thermal expansion, and polarity, introduces a high density of various defects during the growth of III-V on Si. In order to tackle these issues, a variety of growth techniques have been developed so far, leading to the demonstration of high-quality III-V materials and optoelectronic devices monolithically grown on various Si-based platform. In this paper, the recent advances in the heteroepitaxial growth of III-V on Si substrates, particularly GaAs and InP, are discussed. After introducing the fundamental and technical challenges for III-V-on-Si heteroepitaxy, we discuss recent approaches for resolving growth issues and future direction towards monolithic integration of III-V on Si platform.

scholarly journals In-Plane Monolithic Integration of Scaled III-V Photonic Devices

2021 ◽  
Vol 11 (4) ◽  
pp. 1887
Author(s):  
Markus Scherrer ◽  
Noelia Vico Triviño ◽  
Svenja Mauthe ◽  
Preksha Tiwari ◽  
Heinz Schmid ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Cost ◽  
Photonic Devices ◽  
Monolithic Integration ◽  
Light Emitters ◽  
Fully Integrated ◽  
Large Lattice ◽  
Hybrid Iii ◽  
Gain Material

It is a long-standing goal to leverage silicon photonics through the combination of a low-cost advanced silicon platform with III-V-based active gain material. The monolithic integration of the III-V material is ultimately desirable for scalable integrated circuits but inherently challenging due to the large lattice and thermal mismatch with Si. Here, we briefly review different approaches to monolithic III-V integration while focusing on discussing the results achieved using an integration technique called template-assisted selective epitaxy (TASE), which provides some unique opportunities compared to existing state-of-the-art approaches. This method relies on the selective replacement of a prepatterned silicon structure with III-V material and thereby achieves the self-aligned in-plane monolithic integration of III-Vs on silicon. In our group, we have realized several embodiments of TASE for different applications; here, we will focus specifically on in-plane integrated photonic structures due to the ease with which these can be coupled to SOI waveguides and the inherent in-plane doping orientation, which is beneficial to waveguide-coupled architectures. In particular, we will discuss light emitters based on hybrid III-V/Si photonic crystal structures and high-speed InGaAs detectors, both covering the entire telecom wavelength spectral range. This opens a new path towards the realization of fully integrated, densely packed, and scalable photonic integrated circuits.

Growth and processing of heteroepitaxial 3C-SiC films for electronic devices applications

2012 ◽  
Vol 1433 ◽  
Author(s):  
A. Severino ◽  
M. Mauceri ◽  
R. Anzalone ◽  
A. Canino ◽  
N. Piluso ◽  
...  
Keyword(s):  
Growth Parameters ◽  
Low Cost ◽  
Electronic Devices ◽  
Young Modulus ◽  
Interesting Property ◽  
Large Area ◽  
Si Substrates ◽  
Application Fields ◽  
Sic Films

ABSTRACT3C-SiC is very attractive due the chance to be grown on large-area, low-cost Si substrates. Moreover, 3C-SiC has higher channel electron mobility with respect to 4H-SiC, interesting property in MOSFET applications. Other application fields where 3C-SiC can play a significant role are solar cells and MEMS-based sensors. In this work, we present a general overview of 3C-SiC growth on Si substrate. The influence of growth parameters, such as the growth rate, on the crystal quality of 3C-SiC films is discussed. The main issue for 3C-SiC development is the reduction of the stacking fault density, which shows an exponential decreasing trend with the film thickness tending to a saturation value of about 1000 cm-1. Some aspect of processing will be also faced with the realization of cantilever for Young modulus calculations and the implantation of Al ions for the study of damaging and recovery of the 3C-SiC crystal.

Multi-Layer Photopolymer Micromachining

2005 ◽  
Vol 872 ◽  
Author(s):  
J. R. Huang ◽  
B. Bai ◽  
J. Shaw ◽  
T. N. Jackson ◽  
C. Y. Wei ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Integrated Circuits ◽  
High Aspect Ratio ◽  
Low Cost ◽  
Solution Process ◽  
Microfluidic Channel ◽  
Width Ratio ◽  
Large Area ◽  
Additive Process ◽  
Infiltration Process

AbstractThis paper presents a novel method to create and integrate micro-machined devices and high aspect-ratio (height-to-width ratio) microstructures in which the microstructures are built up using multiple layers of photopolymer film and/or viscous solution. Very high aspect-ratio 2-and 3-dimensional (2-D and 3-D) microstructures were constructed by stacking photo-imageable polymer films. Such films may be dry films applied by lamination or solution layers applied by bar coating, or doctor blade coating. Photolithography is used in both cases to define the microstructure. This additive process of thin-film micromachining facilitates high aspect-ratio microstructure fabrication. We have demonstrated structures of up to 12-layers comprising 2-D arrays of deep trenches (180 μm deep and 25 μm wide) and a 2-layer SU-8 micro-trench array with an aspect ratio up to 36 on glass substrates. Miniaturized structures of interconnected reservoirs as small as 50 μm × 50 μm × 15 μm (∼38 pico liter storage capacity) are also being fabricated, along with a novel 5-layer microfluidic channel array and a vacuum-infiltration process for fluid manipulation. This method has the potential to create functional large-area micro-devices at low-cost and with increased device flexibility, durability, prototyping speed, and reduced process complexity for applications in optoelectronics, integrated detectors, and bio-devices. The novel multi-layer photopolymer dry film and solution process also allows microstructures in micro-electro-mechanical systems (MEMS) to be built with ease and provides the functionality of MEMS integration with electronic devices and integrated circuits (ICs).

scholarly journals Recent Progress in Silicon Photonics: A Review

ISRN Optics ◽  
2012 ◽  
Vol 2012 ◽  
pp. 1-27 ◽  
Author(s):  
Zhou Fang ◽  
Ce Zhou Zhao
Keyword(s):  
Integrated Circuits ◽  
Silicon Photonics ◽  
Recent Progress ◽  
State Of The Art ◽  
Low Cost ◽  
Photonic Integrated Circuits ◽  
High Data ◽  
Bandwidth Requirement ◽  
Rate Transmission ◽  
Data Rate Transmission

With the increasing bandwidth requirement in computing and signal processing, the inherent limitations in metallic interconnection are seriously threatening the future of traditional IC industry. Silicon photonics can provide a low-cost approach to overcome the bottleneck of the high data rate transmission by replacing the original electronic integrated circuits with photonic integrated circuits. Although the commercial promise has not been realized, this perspective gives huge impetus to the development of silicon photonics these years. This paper provides an overview of the progress and the state of the art of each component in silicon photonics, including waveguides, filters, modulators, detectors, and lasers, mainly in the last five years.

scholarly journals Progress on Waveguide-Integrated Graphene Optoelectronics

2018 ◽  
Vol 2018 ◽  
pp. 1-9 ◽  
Author(s):  
Jiaqi Wang ◽  
Zhenzhou Cheng ◽  
Xuejin Li
Keyword(s):  
Integrated Circuits ◽  
Low Cost ◽  
Photonic Integrated Circuits ◽  
Hexagonal Lattice ◽  
Single Layer ◽  
Atomic Layer ◽  
Monolayer Graphene ◽  
Basic Principles ◽  
Silicon Photonic ◽  
Graphene Devices

Graphene, a single layer of carbon atoms arranged in the form of hexagonal lattice, has many intriguing optical and electrical properties. However, due to the atomic layer thickness, light-matter interactions in the monolayer graphene are naturally weak when the light is normally incident to the material. To overcome this challenge, waveguide-integrated graphene optoelectronic devices have been proposed and demonstrated. In such coplanar configurations, the propagating light in the waveguide can significantly interact with the graphene layer integrated on the surface of the waveguide. The combination of photonic integrated circuits and graphene also enables the development of graphene devices by using silicon photonic technology, which greatly extends the scope of graphene’s application. Moreover, the waveguide-integrated graphene devices are fully CMOS-compatible, which makes it possible to achieve low-cost and high-density integration in the future. As a result, the area has been attracting more and more attention in recent years. In this paper, we introduce basic principles and research advances of waveguide-integrated graphene optoelectronics.

Epitaxial GaAs on Si: Progress and Potential Applications

1987 ◽  
Vol 91 ◽  
Author(s):  
Don W. Shaw
Keyword(s):  
Integrated Circuits ◽  
Low Cost ◽  
Epitaxial Structure ◽  
Epitaxial Gaas ◽  
Si Substrates ◽  
Gaas On Si ◽  
Potential Applications ◽  
The Individual ◽  
First Time ◽  
Realistic Appraisal

ABSTRACTRecent successes, such as the demonstration of a 1K SRAM, have established epitaxial GaAs on Si substrates as a promising technology rather than a device designer's dream. For the first time we can seriously consider combining the individual electronic and optical properties of GaAs and Si within a single epitaxial structure. Applications for GaAs on Si range from those that simply utilize the Si as a low-cost, large-areapassive substrate with superior strength and thermal conductivity to the long-sought multifunction integrated circuits where Si and III–V components are integrated within a single monolithic chip. This paper will attempt to provide a realistic appraisal of the potential applications of epitaxial GaAs on Si with emphasis on the special demands imposed by each application and barriers that must be circumvented.

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