scholarly journals Nano-Ridge Engineering of GaSb for the Integration of InAs/GaSb Heterostructures on 300 mm (001) Si

Crystals ◽  
2020 ◽  
Vol 10 (4) ◽  
pp. 330 ◽  
Author(s):  
Marina Baryshnikova ◽  
Yves Mols ◽  
Yoshiyuki Ishii ◽  
Reynald Alcotte ◽  
Han Han ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Defect Density ◽  
Bipolar Transistors ◽  
Monolithic Integration ◽  
Threading Dislocation ◽  
Contrast Imaging ◽  
Si Substrates ◽  
Selective Area ◽  
Transmission Electron ◽  
The Impact

Nano-ridge engineering (NRE) is a novel heteroepitaxial approach for the monolithic integration of lattice-mismatched III-V devices on Si substrates. It has been successfully applied to GaAs for the realization of nano-ridge (NR) laser diodes and heterojunction bipolar transistors on 300 mm Si wafers. In this report we extend NRE to GaSb for the integration of narrow bandgap heterostructures on Si. GaSb is deposited by selective area growth in narrow oxide trenches fabricated on 300 mm Si substrates to reduce the defect density by aspect ratio trapping. The GaSb growth is continued and the NR shape on top of the oxide pattern is manipulated via NRE to achieve a broad (001) NR surface. The impact of different seed layers (GaAs and InAs) on the threading dislocation and planar defect densities in the GaSb NRs is investigated as a function of trench width by using transmission electron microscopy (TEM) as well as electron channeling contrast imaging (ECCI), which provides significantly better defect statistics in comparison to TEM only. An InAs/GaSb multi-layer heterostructure is added on top of an optimized NR structure. The high crystal quality and low defect density emphasize the potential of this monolithic integration approach for infrared optoelectronic devices on 300 mm Si substrates.

Reduction of Defect Density in Heteroepitaxial GexSi1-x Grown on Patterned Si Substrates

1989 ◽  
Vol 160 ◽  
Author(s):  
E.A. Fitzgerald ◽  
Y.-H. Xie ◽  
J. Michel ◽  
P.E. Freeland ◽  
B.E. Weir
Keyword(s):  
Defect Density ◽  
Threading Dislocation ◽  
Patterned Substrate ◽  
Si Substrates ◽  
Molecular Beam Epitaxial ◽  
Etch Pit ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Electron Beam Induced Current ◽  
Molecular Beam Epitaxial Growth

AbstractWe have investigated the molecular beam epitaxial growth of GexSi1-x on small growth areas patterned in Si substrates. Electron beam induced current, etch-pit density measurements, transmission electron microscopy, and photoluminescence were used to compare dislocation densities in GexSi1-x on patterned and unpattemed substrates. We find a dramatic reduction in both misfit and threading dislocation densities for the patterned substrate growth. Our results also show that dislocation introduction is dominated by heterogeneous nucleation.

Correlation Between Defect Density and Process Variables In Step-Graded, Relaxed Si0.7Ge0.3 Grown on Si by Rtcvd

1993 ◽  
Vol 303 ◽  
Author(s):  
G. Patrick Watson ◽  
Eugene A. Fitzgerald ◽  
Bahram Jalali ◽  
Ya-Hong Xie ◽  
Bonnie Weir ◽  
...  
Keyword(s):  
Defect Density ◽  
Chemical Vapor ◽  
Dark Spot ◽  
Threading Dislocation ◽  
Dark Line ◽  
Si Substrates ◽  
Transmission Electron ◽  
Threading Dislocation Density ◽  
Line Defects ◽  
Threading Defects

ABSTRACTThe effect of the average grading rate and of the number of incremental Ge alloy steps on the threading dislocation density has been studied in 30% Ge relaxed films formed by rapid thermal chemical vapor deposition (RTCVD) on Si substrates. Electron beam induced current (EBIC) images and transmission electron microscopy (TEM) show that threading defects fall in two categories: individual threading dislocations (dark spot defects), and organized clusters of these threads (pile-ups, or dark line defects). The overall surface defect density must include both categories to properly characterize the material. The lowest defect density, 4 × 105cm−2, was found in specimens grown at an average grading rate of 10% Ge per pm thickness.

TEM evaluation of graded SixGe1-x heterolayers

1991 ◽  
Vol 49 ◽  
pp. 894-895
Author(s):  
N. David Theodore ◽  
Mamoru Tomozane ◽  
Ming Liaw
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Gas Flow ◽  
Field Effect Transistors ◽  
Chemical Vapor ◽  
Dark Field ◽  
Bipolar Transistors ◽  
Structural Quality ◽  
Weak Beam ◽  
Transmission Electron ◽  
And Behavior

There is extensive interest in SiGe for use in heterojunction bipolar transistors. SiGe/Si superlattices are also of interest because of their potential for use in infrared detectors and field-effect transistors. The processing required for these materials is quite compatible with existing silicon technology. However, before SiGe can be used extensively for devices, there is a need to understand and then control the origin and behavior of defects in the materials. The present study was aimed at investigating the structural quality of, and the behavior of defects in, graded SiGe layers grown by chemical vapor deposition (CVD).The structures investigated in this study consisted of Si1-xGex[x=0.16]/Si1-xGex[x= 0.14, 0.13, 0.12, 0.10, 0.09, 0.07, 0.05, 0.04, 0.005, 0]/epi-Si/substrate heterolayers grown by CVD. The Si1-xGex layers were isochronally grown [t = 0.4 minutes per layer], with gas-flow rates being adjusted to control composition. Cross-section TEM specimens were prepared in the 110 geometry. These were then analyzed using two-beam bright-field, dark-field and weak-beam images. A JEOL JEM 200CX transmission electron microscope was used, operating at 200 kV.

Monolithic integration of InGaAsp/Inp lasers and heterostructure bipolar transistors by selective area epitaxy

1993 ◽  
Vol 29 (8) ◽  
pp. 645 ◽  
Author(s):  
X. An ◽  
H. Temkin ◽  
A. Feygenson ◽  
R.A. Hamm ◽  
M.A. Cotta ◽  
...  
Keyword(s):  
Bipolar Transistors ◽  
Monolithic Integration ◽  
Selective Area Epitaxy ◽  
Selective Area

SiGe Heteroepitaxy for High Frequency Circuits

1998 ◽  
Vol 525 ◽  
Author(s):  
B. Tillack ◽  
D. Bolze ◽  
G. Fischer ◽  
G. Kissinger ◽  
D. Knoll ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
High Frequency ◽  
Defect Density ◽  
Process Capability ◽  
Chemical Vapor ◽  
Bipolar Transistors ◽  
Capability Indices ◽  
Data Points ◽  
B Doping ◽  
The Stability

ABSTRACTWe have determined the process capability of Low Pressure (Rapid Thermal) Chemical Vapor Deposition (LP(RT)CVD) of epitaxial Si/SiGe/Si stacks for heterojunction bipolar transistors (HIBTs). The transistor parameters primarily influenced by the epitaxial characteristics were measured for 600 identically processed 4” wafers. The results demonstrate that it is possible to control accurately the epitaxial process for a 25 nm thick graded SiGe base profile with 20 % Ge and very narrow B doping (5 nm). The pipe limited device yield of about 90 % for an emitter area of 104 μm2 indicates a very low defect density in the epitaxial layer stack. The process capability indices determined from about 40,000 data points demonstrate the stability and capability of the LP(RT)CVD epitaxy with regard to manufacturing requirements.

scholarly journals Characterization of Gaas/Si/GaAs Heterointerfaces

1989 ◽  
Vol 148 ◽  
Author(s):  
Zuzanna Liliental-Weber ◽  
Raymond P. Mariella
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Low Temperature ◽  
Defect Density ◽  
Si Substrate ◽  
Reverse Polarity ◽  
Si Substrates ◽  
Transmission Electron ◽  
Metal Semiconductor Metal

ABSTRACTTransmission electron microscopy of GaAs grown on Si for metal-semiconductor-metal photodetectors is presented in this paper. Two kinds of samples are compared: GaAs grown on a 15 Å Si epilayer grown on GaAs, and GaAs grown at low temperature (300°C) on Si substrates. It is shown that the GaAs epitaxial layer grown on thin Si layer has reverse polarity to the substrate (antiphase relation). Higher defect density is observed for GaAs grown on Si substrate. This higher defect density correlates with an increased device speed, but with reduced sensitivity.

GaAs/AlGaAs heterojunction bipolar transistors on Si substrates

1985 ◽  
Author(s):  
R. Fischer ◽  
J. Klem ◽  
J.S. Gedymin ◽  
T. Henderson ◽  
W. Kopp ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Si Substrates

LOW-Temperature Epitaxial Growth of GaAs on Si Substrates by MBE

1992 ◽  
Vol 263 ◽  
Author(s):  
Ting-Yen Chiang ◽  
En-Huery Liu ◽  
Der-Hwa Yiin ◽  
Tri-Rung Yew
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Low Temperature ◽  
Epitaxial Growth ◽  
Defect Density ◽  
Solution Treatment ◽  
Plan View ◽  
Si Substrates ◽  
Gaas On Si ◽  
Transmission Electron

ABSTRACTThis paper presents results of the low—temperature epitaxial growth of GaAs on Si substrates with orientation 1°—4° off (100) by molecular beam epitaxy (MBE). The epitaxial growth ·is carried out on Si wafers subjected to HF solution treatment by “spin-etch” technique before the wafer is transferred to the entry chamber of MBE system. Methods used for reducing defect density in the epitaxial layers are proposed. The characterization techniques include cross-sectional transmission electron microscopy (XTEM), plan-view transmission electron microscopy, scanning electron microscopy (S EM), and double crystal X-ray diffraction (DCXRD). Epitaxial films with a full width at half—maximum (FWHM) of about 310 arcsec measured by DCXRD are obtained without annealing.-

MO-CVD GaAs Grown by Direct Deposition on Si

1987 ◽  
Vol 91 ◽  
Author(s):  
S. M. Vernon ◽  
S. J. Pearton ◽  
J. M. Gibson ◽  
R. Caruso ◽  
C. R. Abernathy ◽  
...  
Keyword(s):  
Chemical Vapor ◽  
Gaas Layer ◽  
Threading Dislocation ◽  
X Ray Diffraction ◽  
Si Substrates ◽  
Transmission Electron ◽  
Activation Data ◽  
Threading Dislocation Density ◽  
Donor Activity

ABSTRACTGaAs layers were grown directly on misoriented (2° off (100)→[011]) Si substrates by Metalorganic Chemical Vapor Deposition. The threading dislocation density at the surface of 4 μm thick layers was typically 108cm−2, as determined by both preferential etching and transmission electron microscopy. Rapid thermal annealing (900°C, 10s) improved the crystalline quality of the GaAs near the heterointerface while allowing no detectable Si diffusion into this layer. Two deep electron traps were observed in the undoped GaAs, but were present at a low concentration (∼ 1013 cm−3 ). The (400) x-ray diffraction peak width from the GaAs was significantly reduced with increasing GaAs layer thickness, indicating improved material quality. This is supported by Si implant activation data, which shows higher net donor activity in thicker layers.

Sign in / Sign up

Export Citation Format

Share Document