scholarly journals Numerical Simulation and Experiment of a High-Efficiency Tunnel Oxide Passivated Contact (TOPCon) Solar Cell Using a Crystalline Nanostructured Silicon-Based Layer

2021 ◽  
Vol 12 (1) ◽  
pp. 392
Author(s):  
Muhammad Quddamah Khokhar ◽  
Shahzada Qamar Hussain ◽  
Muhammad Aleem Zahid ◽  
Duy Phong Pham ◽  
Eun-Chel Cho ◽  
...  
Keyword(s):  
Numerical Simulation ◽  
Open Circuit Voltage ◽  
Silicon Oxide ◽  
Rear Surface ◽  
Open Circuit ◽  
Surface Recombination Velocity ◽  
Silicon Oxide Layer ◽  
Nanostructured Silicon ◽  
Thin Silicon ◽  
Silicon Based

We report on the tunnel oxide passivated contact (TOPCon) using a crystalline nanostructured silicon-based layer via an experimental and numerical simulation study. The minority carrier lifetime and implied open-circuit voltage reveals an ameliorated passivation property, which gives the motivation to run a simulation. The passivating contact of an ultra-thin silicon oxide (1.2 nm) capped with a plasma enhanced chemical vapor deposition (PECVD) grown 30 nm thick nanocrystalline silicon oxide (nc-SiOx), provides outstanding passivation properties with low recombination current density (Jo) (~1.1 fA/cm2) at a 950 °C annealing temperature. The existence of a thin silicon oxide layer (SiO2) at the rear surface with superior quality (low pinhole density, Dph < 1 × 10−8 and low interface trap density, Dit ≈ 1 × 108 cm−2 eV−1), reduces the recombination of the carriers. The start of a small number of transports by pinholes improves the fill factor (FF) up to 83%, reduces the series resistance (Rs) up to 0.5 Ω cm2, and also improves the power conversion efficiency (PEC) by up to 27.4%. The TOPCon with a modified nc-SiOx exhibits a dominant open circuit voltage (Voc) of 761 mV with a supreme FF of 83%. Our simulation provides an excellent match with the experimental results and supports excellent passivation properties. Overall, our study proposed an ameliorated knowledge about tunnel oxide, doping in the nc-SiOx layer, and additionally about the surface recombination velocity (SRV) impact on TOPCon solar cells.

scholarly journals Numerical Simulation Analysis of Ag Crystallite Effects on Interface of Front Metal and Silicon in the PERC Solar Cell

Energies ◽  
2021 ◽  
Vol 14 (3) ◽  
pp. 592
Author(s):  
Myeong Sang Jeong ◽  
Yonghwan Lee ◽  
Ka-Hyun Kim ◽  
Sungjin Choi ◽  
Min Gu Kang ◽  
...  
Keyword(s):  
Solar Cells ◽  
Solar Cell ◽  
High Efficiency ◽  
Open Circuit Voltage ◽  
Surface Recombination ◽  
Open Circuit ◽  
Surface Recombination Velocity ◽  
Metal Interface ◽  
Ag Crystallites ◽  
Recombination Velocity

In the fabrication of crystalline silicon solar cells, the contact properties between the front metal electrode and silicon are one of the most important parameters for achieving high-efficiency, as it is an integral element in the formation of solar cell electrodes. This entails an increase in the surface recombination velocity and a drop in the open-circuit voltage of the solar cell; hence, controlling the recombination velocity at the metal-silicon interface becomes a critical factor in the process. In this study, the distribution of Ag crystallites formed on the silicon-metal interface, the surface recombination velocity in the silicon-metal interface and the resulting changes in the performance of the Passivated Emitter and Rear Contact (PERC) solar cells were analyzed by controlling the firing temperature. The Ag crystallite distribution gradually increased corresponding to a firing temperature increase from 850 ∘C to 950 ∘C. The surface recombination velocity at the silicon-metal interface increased from 353 to 599 cm/s and the open-circuit voltage of the PERC solar cell decreased from 659.7 to 647 mV. Technology Computer-Aided Design (TCAD) simulation was used for detailed analysis on the effect of the surface recombination velocity at the silicon-metal interface on the PERC solar cell performance. Simulations showed that the increase in the distribution of Ag crystallites and surface recombination velocity at the silicon-metal interface played an important role in the decrease of open-circuit voltage of the PERC solar cell at temperatures of 850–900 ∘C, whereas the damage caused by the emitter over fire was determined as the main cause of the voltage drop at 950 ∘C. These results are expected to serve as a steppingstone for further research on improvement in the silicon-metal interface properties of silicon-based solar cells and investigation on high-efficiency solar cells.

The Effect of Al-BSF on Seff and Rb in Industrialized Mono-Silicon Solar Cells

2012 ◽  
Vol 472-475 ◽  
pp. 1846-1850
Author(s):  
Shan Shan Dai ◽  
Gao Jie Zhang ◽  
Xiang Dong Luo ◽  
Jing Xiao Wang ◽  
Wen Jun Chen ◽  
...  
Keyword(s):  
Solar Cells ◽  
Spectral Response ◽  
Short Circuit ◽  
Rear Surface ◽  
Surface Recombination ◽  
Short Circuit Current ◽  
Open Circuit ◽  
Surface Recombination Velocity ◽  
Silicon Solar Cells ◽  
Back Surface

In this work, the effect of aluminum back surface field formed by screen printed various amount of Al paste on the effective rear surface recombination velocity (Seff) and the internal rear reflectance coeffeicient (Rb) of commercial mono-silicon solar cells was investigated. We demonstrated the effect of Seffand Rbon the performance of Al-BSF solar cells by simulating them with PC1D. The simulated results showed that the lower Seffcould get higher open circuit voltage (Voc), at the same time, the larger Rbcould get higher short-circuit current (Isc). Experimentally, we investigated the Seffand Rbthrough depositing Al paste with various amount (3.7, 5, 6, and 8 mg/cm2) for fabricating Al-BSF mono-silicon solar cells. Four group cells were characterized by light I-V, spectral response, hemispherical reflectance and scanning electron microscope (SEM) measurements. It was found that, a minimum Seffof 350 cm/s was gotten from the cells with Al paste of 8 mg/cm2, which was extracted by matching quantum efficiency (QE) from 800 nm to 1200 nm with PC1D, and a maximum Rbof 53.5% was obtained from Al paste of 5 mg/cm2by calculating at 1105 nm with PC1D. When the amount of Al paste was higher than 5mg/cm2, there were less Seffand lower Rb. On the other hand, when Al amount was 3.7mg/cm2, it was too little to form a closed BSF. Based on the SEM graphs and simulations with PC1D, a simple explaination was proposed for the experimental results.

High Open-Circuit Voltage in Silicon Heterojunction Solar Cells

2007 ◽  
Vol 989 ◽  
Author(s):  
Qi Wang ◽  
Matt R. Page ◽  
Eugene Iwancizko ◽  
Yueqin Xu ◽  
Lorenzo Roybal ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Open Circuit Voltage ◽  
Surface Recombination ◽  
Open Circuit ◽  
Surface Recombination Velocity ◽  
Back Surface ◽  
Float Zone ◽  
Double Heterojunction ◽  
Type C ◽  
Recombination Velocity

AbstractHigh open-circuit voltage (Voc) silicon heterojunction (SHJ) solar cells are fabricated in double-heterojunction a-Si:H/c-Si/a-Si:H structures using low temperature (<225°C) hydrogenated amorphous silicon (a-Si:H) contacts deposited by hot-wire chemical vapor deposition (HWCVD). On p-type c-Si float-zone wafers, we used an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain a Voc of 667 mV in a 1 cm2 cell with an efficiency of 18.2%. This is the best reported p-type SHJ voltage. In our labs, it improves over the 652 mV cell obtained with a front amorphous n/i heterojunction emitter and a high-temperature alloyed Al back-surface-field contact. On n-type c-Si float-zone wafers, we used an a Si:H (p/i) front emitter and an a-Si:H (i/n) back contact to achieve a Voc of 691 mV on 1 cm2 cell. Though not as high as the 730 mV reported by Sanyo on n-wafers, this is the highest reported Voc for SHJ c-Si cells processed by the HWCVD technique. We found that effective c-Si surface cleaning and a double-heterojunction are keys to obtaining high Voc. Transmission electron microscopy reveals that high Voc cells require an abrupt interface from c-Si to a-Si:H. If the transition from the base wafer to the a-Si:H incorporates either microcrystalline or epitaxial Si at c Si interface, a low Voc will result. Lifetime measurement shows that the back-surface-recombination velocity (BSRV) can be reduced to ~15 cm/s through a-Si:H passivation. Amorphous silicon heterojunction layers on crystalline wafers thus combine low-surface recombination velocity with excellent carrier extraction.

High-Efficiency HIT Solar Cells for Excellent Power Generating Properties

2008 ◽  
Vol 1123 ◽  
Author(s):  
Toshihiro Kinoshita ◽  
Daisuke Ide ◽  
Yasufumi Tsunomura ◽  
Shigeharu Taira ◽  
Toshiaki Baba ◽  
...  
Keyword(s):  
Solar Cells ◽  
Solar Cell ◽  
Conversion Efficiency ◽  
Production Cost ◽  
High Efficiency ◽  
Open Circuit Voltage ◽  
Short Circuit ◽  
Open Circuit ◽  
Surface Recombination Velocity ◽  
Dominant Factor

AbstractIn order to achieve the widespread use of HIT (Hetero-junction with I etero-Intrinsic T ntrinsic Thin-layer) solar cells, it is important to reduce the power generating cost. There are three main approaches for reducing this cost: raising the conversion efficiency of the HIT cell, using a thinner wafer to reduce the wafer cost, and raising the open circuit voltage to obtain a better temperature coefficient. With the first approach, we have achieved the highest conversion efficiency values of 22.3%, confirmed by AIST, in a HIT solar cell. This cell has an open circuit voltage of 0.725 V, a short circuit current density of 38.9 mA/cm2 and a fill factor of 0.791, with a cell size of 100.5 cm2. The second approach is to use thinner Si wafers. The shortage of Si feedstock and the strong requirement of a lower sales price make it necessary for solar cell manufacturers to reduce their production cost. The wafer cost is an especially dominant factor in the production cost. In order to provide low-priced, high-quality solar cells, we are trying to use thinner wafers. We obtained a conversion efficiency of 21.4% (measured by Sanyo) for a HIT solar cell with a thickness of 85μm. Even better, there was absolutely no sagging in our HIT solar cell because of its symmetrical structure. The third approach is to raise the open circuit voltage. We obtained a remarkably higher Voc of 0.739 V with the thinner cell mentioned above because of its low surface recombination velocity. The high Voc results in good temperature properties, which allow it to generate a large amount of electricity at high temperatures.

Numerical simulation of solar cell open circuit voltage decay

1981 ◽  
Vol 17 (20) ◽  
pp. 745 ◽  
Author(s):  
L. Castañer ◽  
J. Llabería ◽  
J. Garrido ◽  
E. Vilamajó
Keyword(s):  
Numerical Simulation ◽  
Solar Cell ◽  
Open Circuit Voltage ◽  
Open Circuit ◽  
Voltage Decay

High efficiency and high open-circuit voltage quadruple-junction silicon thin film solar cells for future electronic applications

2017 ◽  
Vol 10 (5) ◽  
pp. 1134-1141 ◽  
Author(s):  
Bofei Liu ◽  
Lisha Bai ◽  
Tiantian Li ◽  
Changchun Wei ◽  
Baozhang Li ◽  
...  
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Solar Cell ◽  
Thin Film Solar Cell ◽  
High Efficiency ◽  
Open Circuit Voltage ◽  
Open Circuit ◽  
Thin Film Solar Cells ◽  
Silicon Thin Film ◽  
Silicon Based

A highly efficient quadruple-junction silicon based thin-film solar cell with a remarkably high open-circuit voltage was demonstrated to inspire functional photoelectrical devices for environmental applications.

scholarly journals Положительный заряд в КНС-гетероструктурах с межслойным оксидом кремния

2018 ◽  
Vol 52 (10) ◽  
pp. 1220
Author(s):  
В.П. Попов ◽  
В.А. Антонов ◽  
В.И. Вдовин
Keyword(s):  
Oxygen Vacancies ◽  
Silicon Oxide ◽  
Negative Charge ◽  
Silicon Layer ◽  
Silicon Dioxide Layer ◽  
Silicon Oxide Layer ◽  
Order Of Magnitude ◽  
Silicon Based ◽  
First Time ◽  
Positively Charged

AbstractThe continuous transfer of (001)Si layers 0.2–1.7 μm thick by implanted hydrogen to the c -sapphire surface during direct bonding at high temperatures of 300–500°C is demonstrated for the first time. The formation of an intermediate silicon-oxide layer SiO_ x during subsequent heat treatments at 800–1100°C, whose increase in thickness (up to 3 nm) correlates with an increase in the positive charge Q _ i at the heterointerface to ~1.5 × 10^12 cm^–2 in contrast to the negative charge at the SiO_ x /Al_2O_3 ALD heterointerface. During silicon-layer transfer to sapphire with a thermal silicon-dioxide layer, Q _ i decreases by more than an order of magnitude to 5 × 10^10 cm^–2 with an increase in the SiO_2 thickness from 50 to 400 nm, while the electron and hole mobilities barely differ from the values in bulk silicon. Based on these results, a qualitative model of the formation of positively charged oxygen vacancies in a 5-nm sapphire layer near the bonding interface is proposed.

Optical and structural study of Ge/Si quantum dots on Si(100) surface covered with a thin silicon oxide layer

2005 ◽  
Vol 124-125 ◽  
pp. 462-465 ◽  
Author(s):  
A. Fonseca ◽  
E. Alves ◽  
J.P. Leitão ◽  
N.A. Sobolev ◽  
M.C. Carmo ◽  
...  
Keyword(s):  
Quantum Dots ◽  
Oxide Layer ◽  
Structural Study ◽  
Silicon Oxide ◽  
Silicon Oxide Layer ◽  
Thin Silicon ◽  
Si Quantum Dots
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