scholarly journals CD-ROM system using high performance error correcting system.

1986 ◽  
Vol 40 (6) ◽  
pp. 501-507 ◽  
Author(s):  
Takashi Takeuchi ◽  
Tamotsu Ito ◽  
Tadashi Saito ◽  
Takashi Hoshino ◽  
Hiroo Okamoto ◽  
...  
Keyword(s):  
High Performance ◽  
Cd Rom ◽  
Performance Error

International Conference on Gears 2019

2019 ◽  
Keyword(s):  
Applied Sciences ◽  
High Performance ◽  
Stressed Volume ◽  
Cd Rom ◽  
International Conference ◽  
University Of Technology ◽  
Surface Durability ◽  
Tooth Flank ◽  
Plastic Gears ◽  
Beijing China

Der Bericht ist ausschließlich als PDF-Dokument erschienen! Drei Konferenzen in einer, auf 1.874 Seiten finden Sie jede Menge aller neueste Informationen zum Thema Gears. Die beiden anderen Konferenzen waren: 3rd International Conference on High Performance Plastic Gears 2019 und 3rd International Conference on Gear Production 2019 Achtung: Dieser VDI-Bericht ist ausschließlich als PDF-Datei auf CD-ROM lieferbar! Auszug aus dem 22-seitigen Inhaltsverzeichnis: Foreword 1 K. Stahl, Technische Universität München (TUM), Garching International Conference on Gears 2019 Flank strength Influence of gear surface roughness on pitting and micropitting life 3 E. Bergstedt, Prof. U. Olofsson, KTH, Stockholm, Sweden; J. Lin, Beijing University of Technology, Beijing, China; P. Lindholm, ABB Corporate Research, Västerås, Sweden Influence of stressed volume of tooth flank on the surface durability 15 A. Kubo, Research Institute for Applied Sciences, Ooicho, Kyoto, Japan Transfer of the tooth fl...

Look-ahead seek correction in high-performance CD-ROM drives

1998 ◽  
Vol 44 (1) ◽  
pp. 178-186 ◽  
Author(s):  
S.G. Stan ◽  
H. van Kempen ◽  
G. Leenknegt ◽  
T.H.M. Akkermans
Keyword(s):  
High Performance ◽  
Cd Rom ◽  
Look Ahead

scholarly journals High-Performance and Energy-Efficient Fault Tolerance FPGA-to-FPGA Communication

2021 ◽  
Author(s):  
Naresh Kumar Reddy ◽  
Swamy Cherukuru ◽  
Veena Vani ◽  
Vishal Reddy
Keyword(s):  
Error Detection ◽  
High Speed ◽  
High Performance ◽  
Fault Tolerant ◽  
Key Factors ◽  
Error Detection And Correction ◽  
Performance Error ◽  
Increasing Demand ◽  
Accuracy Performance ◽  
Or Applications

Abstract These days, due to the increasing demand for high speed and parallel computation, several real world applications and systems include multiple FPGAs in them. Due to this, FPGAs often need to communicate among them. So, communication between the FPGAs is one of the key factors that determines the accuracy, performance and correctness of the entire multiple FPGAs systems or applications. This paper presents the design of an efficient multi-bit fault tolerant communication system for FPGA-to-FPGA communication. The proposed design is synthesized and also simulated through Vivado design suit 2018.3 and was communicated with two Kintex-7 FPGA boards. When compared with the existing FPGA-to-FPGA communication and inter FPGA communication designs, the proposed design have higher performance, error detection and correction capability.

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