Research on uranium resource models, a progress report: Part IV, LOGIC, a computer graphics program to construct integrated logic circuits for genetic-geologic models

1981 ◽  
Author(s):  
William A. Scott ◽  
Raymond Marriner Turner ◽  
Richard B. McCammon
1986 ◽  
Vol 4 (3) ◽  
pp. 179 ◽  
Author(s):  
R Langridge ◽  
T E Ferrin ◽  
C C Huang ◽  
L E Jarvis ◽  
W E Jarvis ◽  
...  

1994 ◽  
Vol 37 (2) ◽  
pp. 136-138
Author(s):  
S. N. Shipulin ◽  
S. N. Shilyaev

2019 ◽  
Vol 66 (2) ◽  
pp. 957-962 ◽  
Author(s):  
Byeong Hyeon Lee ◽  
Kyung-Sang Cho ◽  
Ahrum Sohn ◽  
Sungwoo Hwang ◽  
Sang Yeol Lee

In the past decades MOS based digital integrated logic circuits have undergone a successful process of miniaturisation eventually leading to dimensions of a few nanometres. With the dimensions in the range of a few atomic radii the end of conventional MOS technology is approaching. Amongst the prospective candidates for sub 10nm logic are integrated logic circuits based on single-electron devices. In our contribution we present the use of MOSES (Monte-Carlo Single-Electronics Simulator) as a method for simulation of complementary single-electron logic circuits based on the orthodox theory. Simulations of single-electron devices including a single-electron box, a single-electron transistor and a complementary single-electron inverter were carried out. Their characteristics were evaluated at different temperatures and compared to measurement results obtained at other institutions. The potential for room-temperature operation was also assessed.


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