scholarly journals Design of a multilayer on-chip inductor by computational electromagnetic modelling

2019 ◽  
Vol 70 (5) ◽  
pp. 379-385
Author(s):  
Muneeswaran Dhamodaran ◽  
Subramani Jegadeesan ◽  
Arunachalam Murugan
Keyword(s):  
Quality Factor ◽  
Method Of Moments ◽  
Spiral Inductor ◽  
Electromagnetic Modeling ◽  
Technological Parameters ◽  
Full Field ◽  
Electromagnetic Model ◽  
Electromagnetic Modelling ◽  
Spiral Inductors ◽  
On Chip

Abstract This paper presents a design of typical multilayer on-chip inductor to determine the layout parameters of the desired inductance value of electromagnetic modeling. The inductance and quality factor of multilayer on-chip spiral inductors are determined by its layout parameters and technological parameters. These layout parameters must be optimized to obtain the maximum quality factor at the desired frequency of operation. An electromagnetic model with fewer assumptions than empirical equations and higher efficiency than full-field solvers would be welcome. So would facile comparisons of different inductor structures. This paper describes recent works on the electromagnetic modeling of on-chip inductor structures applied to the comparison of inductor geometries, including the traditional spiral inductor and a novel multilayer inductor. The electromagnetic modeling of the investigative model is presented. The modeling and simulation are implemented using the method of moments. To simulate the proposed algorithm, the EM Simulator software is used.

Stacked Transformer: Influence of the Geometrical and Technological Parameters

2015 ◽  
Vol 21 ◽  
pp. 148-164
Author(s):  
Abdelhadi Namoune ◽  
Azzedine Hamid ◽  
Rachid Taleb
Keyword(s):  
Metal Oxide ◽  
Quality Factor ◽  
Secondary Coil ◽  
Ohmic Loss ◽  
Electrical Model ◽  
Primary Coil ◽  
Technological Parameters ◽  
Geometric Characteristics ◽  
On Chip ◽  
Silicon Cmos

In this work, we study the effect of the geometrical and technological parameters on the performance of stacked transformer in crystal metal oxide silicon (CMOS). It also presents the equivalent electrical model of on-chip stacked transformer based on the “2-p” architecture and contains the equations to evaluate its components values. These equations depend on both technological and geometric characteristics of the transformer. The inductance (primary or secondary) and the quality factor (primary or secondary) of on chip stacked transformer depend on the geometrical and technological parameters. We study the effect of the geometrical and technological parameters of on chip transformer, so to establish a methodology of its dimensioning and consequently its integration in a chip. The various geometrical and technological parameters that influence the performance of the transformer: capacitance between primary and secondary coils, oxide capacitance between the (primary coil, secondary coil) and substrate, substrate ohmic loss, and substrate capacitance.

scholarly journals Analysis of the impact of metal thickness and geometric parameters on the quality factor-Q in integrated spiral inductors by means of artificial bee colony technique

2019 ◽  
Vol 9 (4) ◽  
pp. 2918
Author(s):  
Hamid Bouyghf ◽  
Bachir Benhala ◽  
Abdelhadi Raihani
Keyword(s):  
Integrated Circuits ◽  
Quality Factor ◽  
Artificial Bee Colony ◽  
Spiral Inductor ◽  
Geometrical Parameters ◽  
Bee Colony ◽  
Metal Thickness ◽  
Spiral Inductors ◽  
Quality Factor Q ◽  
The Impact

The goal of this present paper is to design, analysis the influence of the inductor geometrical parameters and the effect of the metal thickness on the quality factor-Q in integrated square spiral inductor using an efficient application of the artificial bee colony (ABC) algorithm. The inductors were optimized at 2.4 GHz to determinate their major geometrical dimensions (sp, w, din…) and their number of turns, for uses in radio-frequency integrated circuits (RFICs). The optimization results are validated by the simulation using an electromagnetic simulator (ADS-Momentum). Using matlab software, the study on the impact of the effect of geometrical parameters and the effect of metal thickness, on the factor of quality-Q of spiral inductors, is shown. We first reported that it is possible to improve Q-factors further by increasing the metal thickness, and in the design of inductor; a compromise must be reached between the value of w, n, sp and din to achieve the desired quality factor-Q and other electrical parameters.

scholarly journals IMPROVED PERFORMANCE OF LNA USING HIGH QUALITY FACTOR PGS ON-CHIP SPIRAL INDUCTORS

2020 ◽  
Vol 38 (2) ◽  
pp. 161-171
Author(s):  
Mahmoud A. Abdelghany ◽  
Yehia S. Mohamed ◽  
Asmaa R.Wardany
Keyword(s):  
Quality Factor ◽  
High Quality Factor ◽  
High Quality ◽  
Spiral Inductors ◽  
Improved Performance ◽  
On Chip

scholarly journals On Miniaturizing On-Chip Microstrip Inductors Using Embedded Radiating Dipoles

2007 ◽  
Vol 2007 ◽  
pp. 1-5
Author(s):  
Chungpin Liao ◽  
Hsien-Ming Chang ◽  
Jeng-Shin Hsu
Keyword(s):  
Real Estate ◽  
Quality Factor ◽  
Proton Beam ◽  
Patch Antenna ◽  
Impedance Matching ◽  
Microstrip Antennas ◽  
Mixed Signal ◽  
Resonant Interactions ◽  
Spiral Inductors ◽  
On Chip

As RF mixed-signal and patch-antenna-equipped SOC devices are becoming the dominant products worldwide, concerns over the large real-estate consumption by the spiral inductors (including those for microstrip antennas and impedance-matching inductances), as well as their generally Q-low (quality factor) performance, are now being discussed more than ever. Liao et al. have recently addressed the Q-low issue via using location-selective proton beam bombardment, whereby Q-improvements of 100%–300% were evidenced. That success, nevertheless, is at times tarnished by some undesirable features, that is, the explosive rises of inductances near certain frequencies, which practically cut short the Q-enhancement and were identified to be due to resonant interactions between the inductor-propagating EM wave and the proton-caused defect dipoles. In this paper, however, the authors attempt to turn this resonance-caused undesirability to favor by proposing a new way to greatly shrink down the needed inductor size through dipoles engineering.

Extraction and Analysis of Substrate Parameters in On-Chip Spiral Inductor Model

2019 ◽  
Vol 34 (1) ◽  
pp. 75-80 ◽  
Author(s):  
Xi Li ◽  
Zheng Ren ◽  
Dawei Chen ◽  
Yanling Shi
Keyword(s):  
Spiral Inductor ◽  
On Chip

Transfer Function Analysis and Broadband Scalable Model for On-Chip Spiral Inductors

2011 ◽  
Vol 59 (7) ◽  
pp. 1696-1708 ◽  
Author(s):  
Huang Wang ◽  
Lingling Sun ◽  
Jun Liu ◽  
Huanhuan Zou ◽  
Zhiping Yu ◽  
...  
Keyword(s):  
Transfer Function ◽  
Function Analysis ◽  
Transfer Function Analysis ◽  
Spiral Inductors ◽  
On Chip
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