scholarly journals Bank-Aware Instruction Scheduler for a Multibanked Register File

2018 ◽  
Vol 26 (0) ◽  
pp. 696-705
Author(s):  
Junji Yamada ◽  
Ushio Jimbo ◽  
Ryota Shioya ◽  
Masahiro Goshima ◽  
Shuichi Sakai
Keyword(s):  
Register File ◽  
Instruction Scheduler

Instruction Scheduling Algorithm for Register File Connectivity Clustered VLIW Architecture

2009 ◽  
Vol 31 (1) ◽  
pp. 127-132
Author(s):  
Zhi-Xiong ZHOU ◽  
Hu HE ◽  
Xu YANG ◽  
Yan-Jun ZHANG ◽  
Yi-He SUN
Keyword(s):  
Scheduling Algorithm ◽  
Instruction Scheduling ◽  
Register File

Active-Cycle Based Register File Design for Reduced Ports and Energy

2009 ◽  
Vol 31 (2) ◽  
pp. 299-308 ◽  
Author(s):  
Yu-Lai ZHAO ◽  
Xian-Feng LI ◽  
Dong TONG ◽  
Han-Xin SUN ◽  
Jie CHEN ◽  
...  
Keyword(s):  
Register File ◽  
File Design

Building a retargetable local instruction scheduler

1998 ◽  
Vol 28 (3) ◽  
pp. 249-283 ◽  
Author(s):  
Vicki Allan ◽  
Steven J. Beaty ◽  
Bogong Su ◽  
Philip H. Sweany
Keyword(s):  
Instruction Scheduler

A 0.13 μm 6 GHz 256×32b leakage-tolerant register file

2002 ◽  
Author(s):  
R. Krishnamurthy ◽  
A. Alvandpour ◽  
G. Balamurugan ◽  
N. Shanbhagh ◽  
K. Soumyanath ◽  
...  
Keyword(s):  
Register File
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