Fast-Track Cache: A Huge Racetrack Memory L1 Data Cache

2021 ◽  
Author(s):  
Hugo Tárrega ◽  
Alejandro Valero ◽  
Vicente Lorente ◽  
Salvador Petit ◽  
Julio Sahuquillo
Keyword(s):  
Fast Track ◽  
Data Cache ◽  
L1 Data

Circuit design of a dual-versioning L1 data cache

Integration ◽  
2012 ◽  
Vol 45 (3) ◽  
pp. 237-245 ◽  
Author(s):  
Azam Seyedi ◽  
Adrià Armejach ◽  
Adrián Cristal ◽  
Osman S. Unsal ◽  
Ibrahim Hur ◽  
...  
Keyword(s):  
Circuit Design ◽  
Data Cache ◽  
L1 Data

scholarly journals Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability

IEEE Micro ◽  
2008 ◽  
Vol 28 (1) ◽  
pp. 60-68 ◽  
Author(s):  
Xiaoyao Liang ◽  
Ramon Canal ◽  
Gu-Yeon Wei ◽  
David Brooks
Keyword(s):  
Data Cache ◽  
Process Variability ◽  
L1 Data

Guidelines to design parity protected write-back L1 data cache

2015 ◽  
Author(s):  
Yohan Ko ◽  
Reiley Jeyapaul ◽  
Youngbin Kim ◽  
Kyoungwoo Lee ◽  
Aviral Shrivastava
Keyword(s):  
Data Cache ◽  
L1 Data
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