A Medical-Inspired Framework to Classify Downhole Shocks Waveforms While Drilling

2021 ◽  
Author(s):  
Justo Matheus ◽  
Maja Ignova ◽  
Darwin Amaya
Keyword(s):  
High Frequency ◽  
Field Programmable Gate Array ◽  
Clustering Algorithms ◽  
Control Unit ◽  
Navigation Systems ◽  
Heart Patients ◽  
Catastrophic Failures ◽  
Field Programmable ◽  
Signature Pattern ◽  
Electrocardiogram Signal

Abstract This paper presents a medical approach to classify shock waveforms acquired at 31,250 hertz downhole. The shock signals are treated as drilling electrocardiogram (D-ECG). The D-ECGs are processed using clustering algorithms and merged with drilling incidents to identify an arrhythmic signature pattern that can lead to catastrophic failures. In medicine, the analysis of heartbeat cycles in an electrocardiogram signal is very important for monitoring heart patients. In the drilling industry, downhole shocks are present most of the time. They are present so often that the authors introduce the concept of drilling electrocardiogram (D-ECG) based on shock waveforms acquired at high frequency. The shock module was implemented in hardware using a field programmable gate array (FPGA) and run inside the control unit of an RSS to complement the navigation systems composed. The shock acquisition and processing are performed at 31,250 Hz, providing enough bandwidth to fully reconstruct high-frequency events. A novel methodology combining field incidents with machine learning clustering algorithms is proposed to identify arrhythmic shocks signatures and whirl and bit bounce in real time, preventing failures to the BHA.

scholarly journals Design of Energy Efficient Control Unit and Implementation on High Performance FPGA

2019 ◽  
Vol 8 (12S2) ◽  
pp. 23-26
Keyword(s):  
Power Consumption ◽  
Energy Efficient ◽  
Field Programmable Gate Array ◽  
High Performance ◽  
Control Unit ◽  
Input Output ◽  
Green Communication ◽  
Power Efficient ◽  
Efficient Control ◽  
Field Programmable

With the crisis of power across the globe, green communication and power-efficient devices are getting more and more attention. This work emphasis about the implementation of Control Unit (CU) circuit on FPGA kit. In this project, power consumption of CU circuit is analyzed by changing the different Input/Output (I/O) standards of FPGA. This project is implemented on Xilinx 14.1 tool and the power consumption on CU is calculated with X Power Analyzer tool on 28-Nano-Meter (nm) Artix-7 Field Programmable Gate Array (FPGA). Out of different I/O standards, CU circuit is most power efficient with LVCMOS I/O standard on Artix-7 FPGA

scholarly journals Power Efficient Frequency Scaled and Thermal-Aware Control Unit Design on FPGA

2019 ◽  
Vol 8 (9S2) ◽  
pp. 530-533
Keyword(s):  
Power Consumption ◽  
Energy Efficient ◽  
Field Programmable Gate Array ◽  
Control Unit ◽  
Processing Unit ◽  
Power Efficient ◽  
Central Processing ◽  
Unit Design ◽  
Efficient Control ◽  
Field Programmable

These works describe the implementation of a control unit which is an important part of Central Processing Unit (CPU) with the Field Programmable Gate Array (FPGA). In this work a frequency scaled and thermal aware energy-efficient control unit is designed with the help of 28 nanometer (nm) technology based FPGA. Frequency varies from 100MHz to 5GHz and the rise in frequency also gives rise in power consumption of control unit with FPGA. The thermal properties of FPGA also increase with increment in frequency. This whole experiment is done on Xilinx 14.1 ISE Design Suit and it is observed that lower the frequency, lower will be the power consumption of FPGA.

Car Navigation System using Genetic Algorithm Processor

2010 ◽  
pp. 216-226
Author(s):  
Masaya Yoshikawa
Keyword(s):  
Genetic Algorithm ◽  
Navigation System ◽  
Field Programmable Gate Array ◽  
Navigation Systems ◽  
Search Service ◽  
Field Programmable ◽  
Car Navigation System ◽  
Route Search ◽  
Dedicated Hardware ◽  
Car Navigation

Recently, car navigation systems that support safe and comfortable driving have been used widely. This chapter proposes a new car navigation system which enables the provision of the following three services: (1) the route search service including unspecified stopover points, (2) the route search service for traveling through sightseeing spots and considering sightseeing time, and (3) the quick response using dedicated hardware. Moreover, the proposed car navigation system is implemented on a field programmable gate array, and its validity is verified by several evaluative experiments using actual map information.

scholarly journals SELECTION OF THE OPERATING FREQUENCY OF THE HYDROACOUSTIC SYSTEM FOR REDUCING THE UNDERWATER VEHICLE TO THE DOOR MODULE AND PROPOSALS FOR THE CHOICE OF ITS STRUCTURE

T-Comm ◽  
2021 ◽  
Vol 15 (7) ◽  
pp. 55-61
Author(s):  
Boris I. Filippov ◽  
Keyword(s):  
Navigation System ◽  
High Frequency ◽  
Autonomous Underwater Vehicle ◽  
Control Unit ◽  
Underwater Vehicle ◽  
Operating Frequency ◽  
Navigation Systems ◽  
Basic Set ◽  
Spatial Coordinates ◽  
And Function

The proposed work is a continuation (the second part) of the overall work on the development of the structure of the hydroacoustic navigation system ( HNST) for bringing the autonomous underwater vehicle (AUV) to the docking module (DM). The first part was published in the previous issue of the magazine.The purpose of this is to develop and study a prototype of the equipment for a short-range high-frequency HNST to ensure the docking of AUV with a carrier. The expediency of constructing the equipment of a high-frequency hydroacoustic system for bringing the AUV to DM in the form of a combined information and navigation system combined on the basis has been substantiated. It can use hydroacoustic navigation systems with short and ultrashort antenna bases; it is proposed to use data signals as navigation signals, which are exchanged between the docking module and the autonomous underwater vehicle based on the results of measuring the mutual navigation characteristics. It is recommended to select the operating frequency in the lower part of the allocated frequency range 100 –: 200 kHz. It should be considered that the accuracy of determining the position of the AUV in the process of alignment can be a variable value: with an increase in the distance to the DM, the errors in estimating the spatial coordinates of the AUV can increase without compromising the functionality of the alignment system. Therefore, in order to select a scenario for the movement of the AUV in the process of alignment, it would be desirable to know the dependence of the errors in estimating its spatial coordinates, admissible when con-trolling the movement of the AUV, on the distance to the DM. In the absence of the indicated dependence, it is possible to take advantage of the somewhat overestimated requirements for the targeting zone for the estimation of the navigation characteristics of the targeting HNST. Then the alignment strategy can be reduced to the choice of the AUV motion scenario, which provides the maximum required accuracy of the estimation of its spatial coordinates in the entire alignment zone. A variant of building an HNST, consisting of unified basic sets of a docking module (BS – DM) and an underwater vehicle (BS – AUV), has been proposed. The basic set of the (BS – AUV) underwater vehicle is similar in structure and function to the basic set of the docking module. Its difference from the (BS-DM) is in the presence of a control unit for the underwater vehicle (CUV), through which signals are exchanged between the (BS – AUV) and the AUV autopilot.

scholarly journals Design of Energy Efficient Control Unit and Implementation on High Performance FPGA

2019 ◽  
Vol 8 (12S2) ◽  
pp. 23-26
Keyword(s):  
Power Consumption ◽  
Energy Efficient ◽  
Field Programmable Gate Array ◽  
High Performance ◽  
Control Unit ◽  
Input Output ◽  
Green Communication ◽  
Power Efficient ◽  
Efficient Control ◽  
Field Programmable

With the crisis of power across the globe, green communication and power-efficient devices are getting more and more attention. This work emphasis about the implementation of Control Unit (CU) circuit on FPGA kit. In this project, power consumption of CU circuit is analyzed by changing the different Input/Output (I/O) standards of FPGA. This project is implemented on Xilinx 14.1 tool and the power consumption on CU is calculated with X Power Analyzer tool on 28-Nano-Meter (nm) Artix-7 Field Programmable Gate Array (FPGA). Out of different I/O standards, CU circuit is most power efficient with LVCMOS I/O standard on Artix-7 FPGA.

scholarly journals Field Programmable Gate Array Applications—A Scientometric Review

Computation ◽  
2019 ◽  
Vol 7 (4) ◽  
pp. 63 ◽  
Author(s):  
Juan Ruiz-Rosero ◽  
Gustavo Ramirez-Gonzalez ◽  
Rahul Khanna
Keyword(s):  
Video Processing ◽  
Field Programmable Gate Array ◽  
Logic Gate ◽  
Magnetic Suspension ◽  
Scientometric Analysis ◽  
Navigation Systems ◽  
Computer Algorithms ◽  
Scientific Publications ◽  
Field Programmable ◽  
Gate Array

Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems on chip or even artificial intelligence systems. Scientific publications related to FPGA started in 1992 and, up to now, we found more than 70,000 documents in the two leading scientific databases (Scopus and Clarivative Web of Science). These publications show the vast range of applications based on FPGAs, from the new mechanism that enables the magnetic suspension system for the kilogram redefinition, to the Mars rovers’ navigation systems. This paper reviews the top FPGAs’ applications by a scientometric analysis in ScientoPy, covering publications related to FPGAs from 1992 to 2018. Here we found the top 150 applications that we divided into the following categories: digital control, communication interfaces, networking, computer security, cryptography techniques, machine learning, digital signal processing, image and video processing, big data, computer algorithms and other applications. Also, we present an evolution and trend analysis of the related applications.

scholarly journals Producing Random Bits with Delay-Line-Based Ring Oscillators

2013 ◽  
Vol 59 (1) ◽  
pp. 41-50 ◽  
Author(s):  
Mieczysław Jessa ◽  
Łukasz Matuszewski
Keyword(s):  
High Frequency ◽  
Field Programmable Gate Array ◽  
Delay Line ◽  
Statistical Tests ◽  
Ring Oscillators ◽  
Delay Element ◽  
Novel Approach ◽  
Field Programmable ◽  
Cryptographic Attacks ◽  
Delay Elements

Abstract One of the sources of randomness for a random bit generator (RBG) is jitter present in rectangular signals produced by ring oscillators (ROs). This paper presents a novel approach for the design of delays used in these oscillators. We suggest using delay elements made on carry4 primitives instead of series of inverters or latches considered in the literature. It enables the construction of many high frequency ring oscillators with different nominal frequencies in the same field programmable gate array (FPGA). To assess the unpredictability of bits produced by RO-based RBG, the restarts mechanism, proposed in earlier papers, was used. The output sequences pass all NIST 800-22 statistical tests for smaller number of ring oscillators than the constructions described in the literature. Due to the number of ROs with different nominal frequencies and the method of construction of carry4 primitives, it is expected that the proposed RBG is more robust to cryptographic attacks than RBGs using inverters or latches as delay element.

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