scholarly journals Ultra-reliable flash memory systems for embedded applications

2016 ◽  
Author(s):  
Thomas McCormick
Keyword(s):  
Flash Memory ◽  
Memory Systems ◽  
Embedded Applications

scholarly journals A Block Classification Method with Monitor and Restriction in NAND Flash memory

2021 ◽  
Vol 12 (5) ◽  
pp. 209-215
Author(s):  
Myungsub Lee
Keyword(s):  
Performance Evaluation ◽  
Standard Deviation ◽  
Flash Memory ◽  
Garbage Collection ◽  
Memory Systems ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Wear Leveling ◽  
Block Classification ◽  
Update Frequency

In this paper, we propose a block classification with monitor and restriction (BCMR) method to isolate and reduce the interference of blocks in garbage collection and wear leveling. The proposed method monitors the endurance variation of blocks during garbage collection and detects hot blocks by making a restriction condition based on this information. This method induces block classification by its update frequency for garbage collection and wear leveling, resulting in a prolonged lifespan for NAND flash memory systems. The performance evaluation results show that the BCMR method prolonged the life of NAND flash memory systems by 3.95% and reduced the standard deviation per block by 7.4%, on average.

An Efficient Flash Translation Layer for Large Block NAND Flash Devices

2015 ◽  
Vol 24 (09) ◽  
pp. 1550138 ◽  
Author(s):  
Tae-Sun Chung ◽  
Dong-Joo Park ◽  
Jongik Kim
Keyword(s):  
Flash Memory ◽  
System Performance ◽  
Smart Phones ◽  
Large Block ◽  
Nand Flash ◽  
Digital Cameras ◽  
Key Factor ◽  
Mp3 Players ◽  
Flash Translation Layer ◽  
Embedded Applications

Recently, flash memory is widely used as a non-volatile storage for embedded applications such as smart phones, MP3 players, digital cameras and so on. The software layer called flash translation layer (FTL) becomes more important since it is a key factor in the overall flash memory system performance. Many researchers have proposed FTL algorithms for small block flash memory in which the size of a physical page of flash memory is equivalent to the size of a data sector of the file system. However, major flash vendors have now produced large block flash memory in which the size of a physical page is larger than the file system's data sector size. Since large block flash memory has new features, designing FTL algorithms specialized to large block flash memory is a challenging issue. In this paper, we provide an efficient FTL named LSTAFF* for large block flash memory. LSTAFF* is designed to achieve better performance by using characteristics of large block flash memory and to provide safety by abiding by restrictions of large block flash memory. Experimental results show that LSTAFF* outperforms existing algorithms on a large block flash memory.

A flash memory technology with quasi-virtual ground array for low-cost embedded applications

2001 ◽  
Vol 36 (6) ◽  
pp. 969-978 ◽  
Author(s):  
J. Tsouhlarakis ◽  
G. Vanhorebeek ◽  
G. Verhoeven ◽  
J. De Blauwe ◽  
Shiho Kim ◽  
...  
Keyword(s):  
Flash Memory ◽  
Low Cost ◽  
Embedded Applications

scholarly journals L2 cache performance analysis for MPSoC by tag – comparision

2017 ◽  
Vol 7 (1.5) ◽  
pp. 285
Author(s):  
Jenitha A ◽  
Elumalai R
Keyword(s):  
Performance Analysis ◽  
Shared Memory ◽  
Memory Management ◽  
Memory Systems ◽  
Critical Problem ◽  
Energy Current ◽  
L2 Cache ◽  
Application Processor ◽  
Cache Miss ◽  
Embedded Applications

Memory systems in many applications are becoming increasingly large, contributing to many challenges in the memory management that has led to many method to manage memory. The tag comparison consumes large amount of cache energy. Current methods provide tag comparison cache or failure of the expected cache. Here is proposed an idea based on new call Comparing Tag stages, filter bloom is presented to improve the efficiency of the cache to predict failure and partial tag comparison for the cold line of verification and full comparison check for direct labels. Moreover, the administration of the cache that is filled with cache lines occurs when there is a cache miss. Today's embedded applications use MPSoC. The  MPSoC consists of the following ie more than one  processors, shared memory among the processors available and a global  off-chip memory. Planning of the activities of an integrated application processor and memory partition between processors are two main critical problem. Here, for an integrated application, both task scheduling and partitioning the integrated available L2 cache to reduce the runtime approach is used.

scholarly journals Estimation of Ge nanocrystals size by Raman, X-rays, and HRTEM techniques

2008 ◽  
Vol 14 (S3) ◽  
pp. 61-64 ◽  
Author(s):  
S.R.C. Pinto ◽  
P. Caldelas ◽  
A.G. Rolo ◽  
A. Chahboun ◽  
M.J.M. Gomes
Keyword(s):  
Flash Memory ◽  
Nonvolatile Memory ◽  
High Dielectric Constant ◽  
Memory Systems ◽  
X Rays ◽  
Processing Conditions ◽  
Flash Memories ◽  
Potential Applications ◽  
High Dielectric ◽  
Ge Nanocrystals

Ge NCs have attracted considerable attention because of their potential applications in nonvolatile memory and integrated optoelectronics. A number of groups have already proposed integrate flash memories based on Ge NCs embedded SiO2 matrix. Since Al2O3 presents a high dielectric constant comparatively to SiO2, it is a good candidate to replace silica in flash memory systems, and therefore improve their performances. Moreover, Al2O3 presents good mechanical properties, and supports high temperature, which leads it to be an ideal material for Si processing conditions. However, a few studies have been reported on Ge NCs embedded in Al2O3 matrix.

A Real-Time Flash Memory Storage System in Embedded Environment

2011 ◽  
Vol 341-342 ◽  
pp. 807-810
Author(s):  
Wei Lin ◽  
Yan Yuan Zhang ◽  
Zhan Huai Li
Keyword(s):  
Real Time ◽  
Data Storage ◽  
Flash Memory ◽  
Storage System ◽  
Memory Storage ◽  
Low Power Consumption ◽  
Storage Device ◽  
Object Based ◽  
Consumer Devices ◽  
Embedded Applications

Recently, flash memory is becoming a popular data storage device in most of the electronic consumer devices. It has lots of attractive features such as small size and light weight nature, zero noise, solid-state reliability, low power consumption, and better shock resistant. To make it suitable for real-time embedded applications, this paper presents the design of an object based file system that uses parallel operations to guarantee bounded read-write access latencies to real-time tasks, in the presence of requests from non real-time tasks. The proposed scheme requires minimal support from the underlying operating system.

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