scholarly journals An ASIC Power Analysis System for Digital CMOS Design

2000 ◽  
Author(s):  
Du Van Nguyen
Keyword(s):  
Power Analysis ◽  
Digital Cmos ◽  
Cmos Design ◽  
Analysis System

Analog and digital CMOS design for spread-spectrum wireless communications

2011 ◽  
pp. 817-836
Author(s):  
Samuel Sheng ◽  
Randy Allmon ◽  
Lapoe Lynn ◽  
Ian O'Donnell ◽  
Kevin Stone ◽  
...  
Keyword(s):  
Wireless Communications ◽  
Spread Spectrum ◽  
Digital Cmos ◽  
Cmos Design

A Power Analysis System for Cryptographic Devices

2013 ◽  
Vol 718-720 ◽  
pp. 2376-2382
Author(s):  
Yan Ting Ren ◽  
Li Ji Wu
Keyword(s):  
Normal Mode ◽  
Power Analysis ◽  
Security Analysis ◽  
General Purpose ◽  
Side Channel ◽  
Security Level ◽  
Side Channel Attacks ◽  
Working Models ◽  
Correlation Power Analysis ◽  
Analysis System

In order to test the security of cryptographic devices against Side Channel Attacks (SCA), an automatic general-purpose power analysis system (TH-PAS-01) is designed and implemented. TH-PAS-01 is scalable and can be applied to many cryptographic devices when specific modules are installed. Using the system TH-PAS-01, correlation power analysis (CPA) are carried out on an AES chip under two working models: normal and shuffling mode. The security level of the countermeasure provided by the target chip is verified by TH-PAS-01. The experimental results show that the correct key of the AES chip is obtained with around 50,000 power traces when the chip was working under normal mode, while the whole key bits are not obtained with 960,000 power traces when the chip works under shuffling mode. The automatic general-purpose system TH-PAS-01 is feasible for security analysis on power analysis for cryptographic devices.

A digital CMOS design technique for SEU hardening

2000 ◽  
Vol 47 (6) ◽  
pp. 2603-2608 ◽  
Author(s):  
M.P. Baze ◽  
S.P. Buchner ◽  
D. McMorrow
Keyword(s):  
Design Technique ◽  
Digital Cmos ◽  
Cmos Design

Low Power Digital CMOS Design

1995 ◽  
Author(s):  
Anantha P. Chandrakasan ◽  
Robert W. Brodersen
Keyword(s):  
Low Power ◽  
Digital Cmos ◽  
Cmos Design

Development of Cloud-Dust Based Intelligent Maximum Power Analysis System for Photovoltaic

2015 ◽  
Vol 764-765 ◽  
pp. 881-885 ◽  
Author(s):  
Chung Chi Huang ◽  
Kuan Chen Lin ◽  
Cong Hui Huang ◽  
Chung Lin Huang ◽  
Sheng Fone Yang
Keyword(s):  
Power Analysis ◽  
Maximum Power ◽  
Maximum Efficiency ◽  
Solar Panels ◽  
Monitoring And Control ◽  
Performance Diagnosis ◽  
Evaluation Module ◽  
Analysis System ◽  
And Control ◽  
Np Problem

In the paper, a cloud-dust based intelligent maximum power analysis system for photovoltaic is proposed. In order to resolve NP problem for photovoltaic, factors of photovoltaic are integrated to cloud-dust based intelligent maximum power analysis system for computing. This study is the development of the maximum power analysis system for photovoltaic, to improve the solar panels effects of the different region and enable them to get maximum efficiency of the power generation. The design methodology of this study includes: (1) The monitoring and control Module (2) The prediction and evaluation module (3) The performance diagnosis module (4) The maintenance prescription module. At last, we can find the advantages of the cloud-dust based intelligent maximum power analysis system for photovoltaic. It increases overall competitive performance of products, reduces cost of products and consummation rates of human resources.

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