Analog and digital CMOS design for spread-spectrum wireless communications

2011 ◽  
pp. 817-836
Author(s):  
Samuel Sheng ◽  
Randy Allmon ◽  
Lapoe Lynn ◽  
Ian O'Donnell ◽  
Kevin Stone ◽  
...  
Keyword(s):  
Wireless Communications ◽  
Spread Spectrum ◽  
Digital Cmos ◽  
Cmos Design

A digital CMOS design technique for SEU hardening

2000 ◽  
Vol 47 (6) ◽  
pp. 2603-2608 ◽  
Author(s):  
M.P. Baze ◽  
S.P. Buchner ◽  
D. McMorrow
Keyword(s):  
Design Technique ◽  
Digital Cmos ◽  
Cmos Design

Low Power Digital CMOS Design

1995 ◽  
Author(s):  
Anantha P. Chandrakasan ◽  
Robert W. Brodersen
Keyword(s):  
Low Power ◽  
Digital Cmos ◽  
Cmos Design

scholarly journals NANO-studio, the design environment of filter banks implemented in standard CMOS technology

2021 ◽  
Author(s):  
Andrzej Handkiewicz ◽  
Mariusz Naumowicz
Keyword(s):  
Impulse Response ◽  
Filter Banks ◽  
Finite Impulse Response ◽  
Infinite Impulse Response ◽  
Cmos Process ◽  
Digital Cmos ◽  
Additional Advantage ◽  
Analysis And Synthesis ◽  
Optimization Parameters ◽  
Synthesis Filter

AbstractThe paper presents a method of optimizing frequency characteristics of filter banks in terms of their implementation in digital CMOS technologies in nanoscale. Usability of such filters is demonstrated by frequency-interleaved (FI) analog-to-digital converters (ADC). An analysis filter present in these converters was designed in switched-current technique. However, due to huge technological pitch of standard digital CMOS process in nanoscale, its characteristics substantially deviate from the required ones. NANO-studio environment presented in the paper allows adjustment, with transistor channel sizes as optimization parameters. The same environment is used at designing a digital synthesis filter, whereas optimization parameters are input and output conductances, gyration transconductances and capacitances of a prototype circuit. Transition between analog s and digital z domains is done by means of bilinear transformation. Assuming a lossless gyrator-capacitor (gC) multiport network as a prototype circuit, both for analysis and synthesis filter banks in FI ADC, is an implementation of the strategy to design filters with low sensitivity to parameter changes. An additional advantage is designing the synthesis filter as stable infinite impulse response (IIR) instead of commonly used finite impulse response (FIR) filters. It provides several dozen-fold saving in the number of applied multipliers.. The analysis and synthesis filters in FI ADC are implemented as filter pairs. An additional example of three-filter bank demonstrates versatility of NANO-studio software.

A Digital CMOS DNA Chip

2005 ◽  
Author(s):  
A. Frey ◽  
M. Schienle ◽  
C. Paulus ◽  
Zou Jun ◽  
F. Hofmann ◽  
...  
Keyword(s):  
Dna Chip ◽  
Digital Cmos
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