Thermally Grown and Reoxidized Nitrides as Alternative Gate Dielectrics

2003 ◽  
Vol 786 ◽  
Author(s):  
Alexandra Ludsteck ◽  
Waltraud Dietl ◽  
Hinyiu Chung ◽  
Joerg Schulze ◽  
Zsolt Nenyei ◽  
...  
Keyword(s):  
Leakage Current ◽  
Gate Dielectrics ◽  
Interface State ◽  
Boron Diffusion ◽  
Gate Stacks ◽  
Process Gas ◽  
High K ◽  
Current Densities ◽  
High K Materials ◽  
Thermal Nitridation

ABSTRACTThe use of high-k materials as gate dielectric still meets a lot of unsolved problems such as thermal instability during post deposition anneals resulting in the formation of interfacial oxide layers or bad process compatibility. As long as these requirements are not accomplished alternative gate dielectrics have to be formed by oxynitrides or gate stacks built of oxynitrides and some high-k material. In order to achieve a low equivalent oxide thickness (EOT) it is necessary to grow homogeneously thin oxynitrides which are nitrogen-rich and which have a high interface quality. Therefore we have studied the growth of thin nitrides and oxynitrides (EOT = 1 – 2nm) formed by rapid thermal nitridation in NH3 and wet reoxidation. By varying the partial pressure of NH3 in the process gas ambient NH3/Ar the nitride quality could be optimized: it was found that an optimized ratio of NH3 and Ar during nitridation improves the electrical properties of the nitrides and oxynitrides significantly. Interface state densities as low as those of dry thermal oxides and leakage current densities reduced by four orders of magnitude compared to SiO2 of the same EOT have been obtained. Due to the high incorporation of nitrogen into the oxynitride by rapid thermal nitridation and following oxidation the leakage current densities are also lower than those of most oxynitrides reported in literature. In addition we present data concerning the suppression of boron diffusion from p+ poly-Si electrodes. In summary the developed oxynitrides are suitable to bridge the gap between common SiO2 and new alternative gate dielectrics or to form gate stacks in combination with high-k materials.

Leakage Current Mechanisms in Epitaxial Gd[sub 2]O[sub 3] High-k Gate Dielectrics

2008 ◽  
Vol 11 (3) ◽  
pp. G12 ◽  
Author(s):  
H. D. B. Gottlob ◽  
T. J. Echtermeyer ◽  
M. Schmidt ◽  
T. Mollenhauer ◽  
T. Wahlbrink ◽  
...  
Keyword(s):  
Leakage Current ◽  
Gate Dielectrics ◽  
High K

Importance of Leakage Current Noise Analysis for Accurate Lifetime Prediction of High-k Gate Dielectrics

2005 ◽  
Author(s):  
Kenji OKADA ◽  
Hiroyuki OTA ◽  
Tsuyoshi HORIKAWA ◽  
Yasuyuki TAMURA ◽  
Takaoki SASAKI ◽  
...  
Keyword(s):  
Leakage Current ◽  
Gate Dielectrics ◽  
Noise Analysis ◽  
Lifetime Prediction ◽  
Current Noise ◽  
High K

The Effect of Ternary Material (Zr, Y, and O) High-k Gate Dielectrics

2013 ◽  
Vol 699 ◽  
pp. 422-425 ◽  
Author(s):  
K.C. Lin ◽  
C.H. Chou ◽  
J.Y. Chen ◽  
C.J. Li ◽  
J.Y. Huang ◽  
...  
Keyword(s):  
Surface Roughness ◽  
Electrical Property ◽  
Leakage Current ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Gate Dielectrics ◽  
Bottom Layer ◽  
Oxide Thickness ◽  
Equivalent Oxide Thickness ◽  
High K

In this research, the Y2O3 layer is doped with the zirconium through co-sputtering and rapid thermal annealing (RTA) at 550°C, 700°C, and 850°C. Then the Al electrode is deposited to generate two kinds of structures, Al/ZrN/ Y2O3/ Y2O3+Zr/p-Si and Al/ZrN/ Y2O3+Zr/ Y2O3/p-Si. According to the XRD results, when Zr was doped on the upper layer, the crystallization phenomenon was more significant than Zr was at the bottom layer, meaning that Zr may influence the diffusion of the oxygen. The AFM also shows that the surface roughness of Zr has worse performance. For the electrical property, the influence to overall leakage current is increased because the equivalent oxide thickness (EOT) is thinner.

High Permittivity Oxide Gate Stacks on Silicon Incorporating UHV Silicon Nitride Interfacial Layers

2001 ◽  
Vol 670 ◽  
Author(s):  
Mark A. Shriver ◽  
Ann M. Gabrys ◽  
T. K. Higman ◽  
S. A. Campbell
Keyword(s):  
Oxide Thickness ◽  
Interface State ◽  
Nitride Layer ◽  
State Density ◽  
Interface State Density ◽  
Equivalent Oxide Thickness ◽  
Gate Stacks ◽  
High Permittivity ◽  
Interfacial Layers ◽  
Thermal Nitridation

ABSTRACTCurrent high permittivity material deposition techniques produce a low permittivity oxide interfacial layer consequently increasing the equivalent oxide thickness. This interfacial oxide layer can be prevented by initially growing a thin nitride layer to act as a diffusion barrier. The interfacial nitride layer must also have low interface state densities comparable to state-of-the-art SiO2 insulators in order to be suitable for MOSFETs. The nitride layer used in this study was formed by thermal nitridation in a UHV system, with the subsequent high permittivity deposition done in an adjoining system. After forming capacitors from these films, capacitance vs. voltage (C-V) techniques were used to determine the interface state density and equivalent oxide thickness of the films. Gate stack films were produced on Si(100) and Si(111) and the results are compared. Gate stacks on Si(100) show a slight increase in stretchout in the high frequency C-V curves for both n-type and p-type samples. Initial data suggests that Si(111) has a lower interface state density than the Si(100) gate stacks. This may be attributed to the Si3N4layer on Si(111) being epitaxial nitride.

The Influence of High-k Material/SiO2 Gate Stacks on Direct Gate Tunneling Current of Cylindrical Surrounding-Gate MOSFETs

2016 ◽  
Vol 709 ◽  
pp. 19-22 ◽  
Author(s):  
Fatimah A. Noor ◽  
Christoforus Bimo ◽  
Khairurrijal
Keyword(s):  
Tunneling Current ◽  
The Self ◽  
Gate Stacks ◽  
High K ◽  
Self Consistent ◽  
Surrounding Gate ◽  
Gate Tunneling ◽  
High K Materials ◽  
High K Dielectric ◽  
Quantum Perturbation Theory

In this paper, we present a model of gate tunneling current in cylindrical surrounding-gate MOSFETs through dual layer high-k dielectric/SiO2 stacks. The model was derived under a quantum perturbation theory by taking into account both structural and electrical confinement effects. The influences of high-k materials and SiO2 thickness on the gate tunneling current have been studied. The calculated results show that the HfO2 is the most effective high-k material to decrease the gate tunneling current. It is also shown that the gate tunneling current is reduced with the SiO2 thickness. In addition, the obtained tunneling currents are fitted well with those obtained under the self-consistent calculation.

Leakage current mechanism and effect of Y2O3 doped with Zr high-K gate dielectrics

2015 ◽  
Vol 55 (11) ◽  
pp. 2198-2202 ◽  
Author(s):  
K.C. Lin ◽  
P.C. Juan ◽  
C.H. Liu ◽  
M.C. Wang ◽  
C.H. Chou
Keyword(s):  
Leakage Current ◽  
Gate Dielectrics ◽  
High K ◽  
Leakage Current Mechanism ◽  
Current Mechanism

Low-Oxygen Nitride Layers Produced by UHV Ammonia Nitridation of Silicon

2000 ◽  
Vol 611 ◽  
Author(s):  
Mark A. Shriver ◽  
T.K. Higman ◽  
S.A. Campbell ◽  
Charles J. Taylor ◽  
Jeffrey Roberts
Keyword(s):  
Diffusion Barrier ◽  
Amorphous Layer ◽  
Interface State ◽  
State Density ◽  
Low Oxygen ◽  
High K ◽  
Oxygen Contamination ◽  
State Densities ◽  
High Concentrations ◽  
Thermal Nitridation

ABSTRACTIf chemically vapor deposited high permittivity materials such as TiO2 and Ta2O5 are to gain wide acceptance as alternatives to SiO2 gates in silicon MOSFETs, the interface between the deposited high-k material and the silicon must be abrupt and have a low density of electrically active defects. Unfortunately, the process for depositing these materials often produces an unacceptably thick, low-permittivity amorphous layer at the interface, which reduces the effectiveness of the high-k material and often contains unacceptably large numbers of charge states. One way to prevent this layer from forming is to deliberately introduce a very thin layer of Si3N4 to act as a diffusion barrier prior to deposition of the high-k material. Previous work has shown nitrides to have high concentrations of traps and interface states, but these films also had considerable oxygen contamination, particularly at the nitride-silicon interface. In this paper, we show that direct thermal nitridation of the silicon surface in ammonia can provide a low interface state density surface that is also an excellent diffusion barrier. A key feature of this process is the various techniques needed to obtain very low oxygen incorporation in the Si3N4. Even at the Si3N4-Si interface, the oxygen content was near the detection limits (0.5%) of Auger Electron Spectroscopy (AES). The nitride films were grown in a range of temperatures that resulted in self-limited thicknesses from a few monolayers to a few nanometers. These films were then characterized by Auger, Time-of-Flight SIMS, and in the case of the thicker films, capacitance-voltage techniques on both n- and p-type silicon substrates. The data shows very low levels of oxygen contamination in the nitride films and low interface state densities in capacitors fabricated from this material.

Band Alignments of High-K Dielectrics on Si and Pt

1999 ◽  
Vol 592 ◽  
Author(s):  
J Robertson ◽  
E Riassi ◽  
J-P Maria ◽  
A I Kingon
Keyword(s):  
Conduction Band ◽  
Gate Dielectrics ◽  
Random Access ◽  
Leakage Currents ◽  
Band Offsets ◽  
Silicon Devices ◽  
High K ◽  
Band Alignments ◽  
High K Materials ◽  
High Dielectric

ABSTRACTMaterials with a high dielectric constant (K) such as tantalum pentoxide (Ta2O5) and barium strontium titanate (BST) are needed for insulators in dynamic random access memory capacitors and as gate dielectrics in future silicon devices. The band offsets of these oxides must be over 1 eV for both electrons and holes, to minimise leakage currents due to Schottky emission. We have calculated the band alignments of many high K materials on Si and metals using the method of charge neutrality levels. Ta2O5 and BST have rather small conduction band offsets on Si, because the band alignments are quite asymmetric. Other wide gap materials Al2O3, Y2O3, ZrO2 and ZrSiO4 are found to have offsets of over 1.5 eV for both electrons and holes, suggesting that these are preferable dielectrics. Zirconates such as BaZrO3 have wider gaps than the titanates, but they still have rather low conduction band offsets on Si. The implications of the results for future generations of MOSFETs and DRAMS are discussed.

Vt Variation Suppressed Al2O3-Capped HfO2 Gate Dielectrics for Low Vt pMISFETs with High-k/Metal Gate Stacks

2008 ◽  
Author(s):  
T. Morooka ◽  
T. Matsuki ◽  
N. Mise ◽  
S. Kamiyama ◽  
T. Nabatame ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Gate Stacks ◽  
Metal Gate ◽  
High K
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