Fabrication of Micro- and Nanoscale SiC Structures Using Selective Deposition Processes

2003 ◽  
Vol 782 ◽  
Author(s):  
L. Chen ◽  
X. A. Fu ◽  
C. A. Zorman ◽  
M. Mehregany

ABSTRACTA method to fabricate nanometer scale SiC beams and nanoporous SiC shells using conventional microlithographic techniques combined with selective APCVD has been developed as an alternative to nanolithographic patterning and electrochemical etching. The process involves the selective deposition of poly-SiC films on patterned SiO2/polysilicon/SiO2 thin film multilayers on (100) Si substrates using a carbonization-based 3C-SiC growth process. This technique capitalizes on significant differences in the nucleation of SiC on SiO2 and polysilicon surfaces in order to form mechanically durable and chemically stable structures.

1989 ◽  
Vol 164 ◽  
Author(s):  
K. Baert ◽  
P. Deschepper ◽  
H. Pattyn ◽  
J. Nijs ◽  
R. Mertens

Abstractμc-Si:H:F can be deposited by if plasma-CVD of fluorinated gas sources like SiF4 and SiH2F2, mixed with H2 and/or SiH4. However, this growth process is usually not selective: the layers are deposited on SiO2 as well as on Si substrates. In this paper, selective growth from SiF4 + SiH4 is reported. N+ Si layers were deposited on <100> Si and poly-Si with a conductivity up to 300 resp. 100 S/cm. The selective growth process was applied for Source and Drain regions of poly-Si thin film transistors on insulating substrate.


Author(s):  
Jack Zhou ◽  
Guoliang Yang

There are three major steps toward the fabrication of a single-digit nanohole: (1) preparing the free-standing thin film by epitaxial deposition and electrochemical etching, (2) making submicron holes (0.2–0.02 μm) by focused ion beam (FIB), and (3) reducing the hole to less than 10 nm by FIB-induced deposition. One specific aim for this paper is to model, simulate, and control the focused ion-beam machining process to fabricate holes that can reach a single-digit nanometer scale on solid-state thin films. Preliminary work has been done on the thin film (30 nm in thickness) preparation, submicron hole fabrication, and ion-beam-induced deposition, and the results are presented.


2007 ◽  
Vol 1009 ◽  
Author(s):  
Allison Hess ◽  
Rocco Parro ◽  
Jiangang Du ◽  
Jeremy Dunning ◽  
Maximillian Scardelletti ◽  
...  

AbstractThis paper reports our effort to develop amorphous silicon carbide (a-SiC) films for use as hermetic thin film coatings for mechanically-flexible neural electrodes. In our work, the a-SiC films were deposited by plasma enhanced chemical vapor deposition (PECVD) using two distinct methods, namely a single precursor approach using trimethylsilane, and a dual precursor approach using methane (CH4) and silane (SiH4). The mechanical properties of films deposited on Si substrates were characterized using the wafer curvature and load-deflection methods. The effectiveness of the films as moisture barriers for polyimide substrates was characterized by measuring the leakage currents of SiC-coated interdigitated electrode structures soaked in PBS. A microfabricated prototype of the flat interface nerve electrode (FINE) based on a flexible polyimide substrate and a PECVD SiC capping layer was fabricated using a monolithic process based on conventional micromachining techniques. To facilitate this approach, a reactive ion etching process was developed that exhibited high etch rates and high selectively to the SiC films.


Electronics ◽  
2021 ◽  
Vol 10 (2) ◽  
pp. 200
Author(s):  
Do Won Kim ◽  
Hyeon Joong Kim ◽  
Changmin Lee ◽  
Kyoungdu Kim ◽  
Jin-Hyuk Bae ◽  
...  

Sol-gel processed SnO2 thin-film transistors (TFTs) were fabricated on SiO2/p+ Si substrates. The SnO2 active channel layer was deposited by the sol-gel spin coating method. Precursor concentration influenced the film thickness and surface roughness. As the concentration of the precursor was increased, the deposited films were thicker and smoother. The device performance was influenced by the thickness and roughness of the SnO2 active channel layer. Decreased precursor concentration resulted in a fabricated device with lower field-effect mobility, larger subthreshold swing (SS), and increased threshold voltage (Vth), originating from the lower free carrier concentration and increase in trap sites. The fabricated SnO2 TFTs, with an optimized 0.030 M precursor, had a field-effect mobility of 9.38 cm2/Vs, an SS of 1.99, an Ion/Ioff value of ~4.0 × 107, and showed enhancement mode operation and positive Vth, equal to 9.83 V.


Coatings ◽  
2020 ◽  
Vol 11 (1) ◽  
pp. 23
Author(s):  
Weiguang Zhang ◽  
Jijun Li ◽  
Yongming Xing ◽  
Xiaomeng Nie ◽  
Fengchao Lang ◽  
...  

SiO2 thin films are widely used in micro-electro-mechanical systems, integrated circuits and optical thin film devices. Tremendous efforts have been devoted to studying the preparation technology and optical properties of SiO2 thin films, but little attention has been paid to their mechanical properties. Herein, the surface morphology of the 500-nm-thick, 1000-nm-thick and 2000-nm-thick SiO2 thin films on the Si substrates was observed by atomic force microscopy. The hardnesses of the three SiO2 thin films with different thicknesses were investigated by nanoindentation technique, and the dependence of the hardness of the SiO2 thin film with its thickness was analyzed. The results showed that the average grain size of SiO2 thin film increased with increasing film thickness. For the three SiO2 thin films with different thicknesses, the same relative penetration depth range of ~0.4–0.5 existed, above which the intrinsic hardness without substrate influence can be determined. The average intrinsic hardness of the SiO2 thin film decreased with the increasing film thickness and average grain size, which showed the similar trend with the Hall-Petch type relationship.


Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1629
Author(s):  
Hyeon-Joong Kim ◽  
Do-Won Kim ◽  
Won-Yong Lee ◽  
Sin-Hyung Lee ◽  
Jin-Hyuk Bae ◽  
...  

In this study, sol–gel-processed Li-doped SnO2-based thin-film transistors (TFTs) were fabricated on SiO2/p+ Si substrates. The influence of Li dopant (wt%) on the structural, chemical, optical, and electrical characteristics was investigated. By adding 0.5 wt% Li dopant, the oxygen vacancy formation process was successfully suppressed. Its smaller ionic size and strong bonding strength made it possible for Li to work as an oxygen vacancy suppressor. The fabricated TFTs consisting of 0.5 wt% Li-doped SnO2 semiconductor films delivered the field-effect mobility in a 2.0 cm2/Vs saturation regime and Ion/Ioff value of 1 × 108 and showed enhancement mode operation. The decreased oxygen vacancy inside SnO2 TFTs with 0.5 wt% Li dopant improved the negative bias stability of TFTs.


Coatings ◽  
2021 ◽  
Vol 11 (4) ◽  
pp. 398
Author(s):  
Pablo Caño ◽  
Carmen M. Ruiz ◽  
Amalia Navarro ◽  
Beatriz Galiana ◽  
Iván García ◽  
...  

Gallium phosphide (GaP) is an ideal candidate to implement a III-V nucleation layer on a silicon substrate. The optimization of this nucleation has been pursued for decades, since it can form a virtual substrate to grow monolithically III-V devices. In this work we present a GaP nucleation approach using a standard MOVPE reactor with regular precursors. This design simplifies the epitaxial growth in comparison to other routines reported, making the manufacturing process converge to an industrial scale. In short, our approach intends to mimic what is done to grow multijunction solar cells on Ge by MOVPE, namely, to develop a growth process that uses a single reactor to manufacture the complete III-V structure, at common MOVPE process temperatures, using conventional precursors. Here, we present the different steps in such GaP nucleation routine, which include the substrate preparation, the nucleation itself and the creation of a p-n junction for a Si bottom cell. The morphological and structural measurements have been made with AFM, SEM, TEM and Raman spectroscopy. These results show a promising surface for subsequent III-V growth with limited roughness and high crystallographic quality. For its part, the electrical characterization reveals that the routine has also formed a p-n junction that can serve as bottom subcell for the multijunction solar cell.


1986 ◽  
Vol 77 (1-3) ◽  
pp. 229-234 ◽  
Author(s):  
S.M. Bedair ◽  
J.K. Whisnant ◽  
N.H. Karam ◽  
D. Griffis ◽  
N.A. El-Masry ◽  
...  

2006 ◽  
Vol 21 (2) ◽  
pp. 505-511 ◽  
Author(s):  
Lili Hu ◽  
Junlan Wang ◽  
Zijian Li ◽  
Shuang Li ◽  
Yushan Yan

Nanoporous silica zeolite thin films are promising candidates for future generation low-dielectric constant (low-k) materials. During the integration with metal interconnects, residual stresses resulting from the packaging processes may cause the low-k thin films to fracture or delaminate from the substrates. To achieve high-quality low-k zeolite thin films, it is important to carefully evaluate their adhesion performance. In this paper, a previously reported laser spallation technique is modified to investigate the interfacial adhesion of zeolite thin film-Si substrate interfaces fabricated using three different methods: spin-on, seeded growth, and in situ growth. The experimental results reported here show that seeded growth generates films with the highest measured adhesion strength (801 ± 68 MPa), followed by the in situ growth (324 ± 17 MPa), then by the spin-on (111 ± 29 MPa). The influence of the deposition method on film–substrate adhesion is discussed. This is the first time that the interfacial strength of zeolite thin films-Si substrates has been quantitatively evaluated. This paper is of great significance for the future applications of low-k zeolite thin film materials.


2001 ◽  
Vol 46 (17) ◽  
pp. 1439-1442 ◽  
Author(s):  
Zhi Chen ◽  
Shigang Sun ◽  
Nan Ding ◽  
Zhiyou Zhou

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