Materials Surface Processing with Excimer Lasers

1986 ◽  
Vol 76 ◽  
Author(s):  
David J. Elliott ◽  
Bernhard P. Piwczyk

ABSTRACTThe continued reduction of VLSI circuit geometries together with increasingly higher levels of circuit integration create the demand for new circuit fabrication technologies. One of the limitations of current IC fabrication technology is the use of high temperature processing. High temperatures severely distort silicon wafers, causing loss of geometry control and a subsequent reduction of device yield. Excimer laser technology, at very short ultra-violet wavelengths offers the possibility of extremely low temperature processing, including the following major applications: Photoresist exposure, photoresist ablation over alignment marks, annealing and etching. In addition, applications in circuit personalization and fiber optics appear as very promising new applications for excimer laser technology in the electronics industry.

1986 ◽  
Vol 76 ◽  
Author(s):  
Y. Horiike ◽  
R. Yoshikawa ◽  
H. Okano ◽  
M. Nakase ◽  
H. Komano ◽  
...  

ABSTRACTRecent progress in microfabrication technologies for advanced VLSI devices, such as 16M and 64MDRAM, is presented. First, an EB delineator with a vector-scanned VSB on a moving stage has been developed for printing 0.25 μm patterns employing PMMA, high dose exposure, and 50 KeV EB. Optical lithography also has been extended toward lower submicron geometry. A Krf excimer laser reduction projection system, using a quartz/CaF2 lens, resolves successfully 0.35 μm patterns. Ga field ion beam technology has been developed with new applications in fuse-cutting of redundancy and in optimizing sense amplifier by cutting transistor gates in the SRAM device. For fine line etching technology, collimated reactive ions produced by 10−3 Torr magnetron discharge achieves deep Si trench etching and tapered Al etching by using a polymer deposition process in addition to the original thin sidewall film. Finally, a damage-free excimer laser etching process has been developed which can etch n+ poly-Si with resist mask and with pattern transfer using an optics down to 0.5 μm and 0.9 μm resolutions respectively.


MRS Bulletin ◽  
1994 ◽  
Vol 19 (8) ◽  
pp. 75-75
Author(s):  
J. Torres

Multilevel metallization is becoming an increasingly interesting area of research as circuit fabrication technologies are scaled down to deep submicron dimensions. The mainstream of today's interconnection technology is AlSiCu metallization. Al-based solutions, however, seem to be limited in resistivity as well as in electromigration performance. Because of its low electrical resistivity and its resistance to electromigration, copper is considered to be a promising new solution for on-chip interconnections. The performance of copper would allow its use in wiring with very small linewidths, as required for ULSI circuits. Before considering copper metallization in ULSI processing, however, major problems still have to be overcome.Taking into account these considerations, a European project is now devoted to the evaluation of copper-based metallization for ULSI applications. The project, Copper Interconnection (COIN), associates the efforts of seven European partners.The objectives of COIN are to evaluate and develop a set of optimized solutions which demonstrate to our industrial partners the interest of using on-chip copper metallization. High deposition rates, low temperature processing, thermal stability, reliability, and low cost are the main goals.The COIN project is devoted to an exploratory study concerning the major issues to be addressed in order to reach the above targets. The choice is to limit, for as long as possible, the modifications of existing multilevel metallization (MLM) structures to a simple replacement of the aluminum by copper interconnection levels. The refractory metal layers in MLM structures (TiSi2, Ti, TiN, W) will be maintained in the copper metallization scheme as will the use of SiO2 as the dielectric material. Another consideration in our approach is the possibility of achieving this substitution with minimum modification to existing fabrication lines. Thus, processes for copper deposition and copper patterning will be developed using existing machines and machine concepts for as long as possible.


1994 ◽  
Vol 321 ◽  
Author(s):  
H. Kuriyama ◽  
K. Sano ◽  
S. Ishida ◽  
T. Nohda ◽  
Y. Aya ◽  
...  

ABSTRACTWe have succeeded in obtaining nondoped, thin poly-Si film (thickness ∼500Å) with excellent crystallinity and large grain size (Maximum grain size ∼4.5 μ m) by an excimer laser annealing Method, which offers the features of low-temperature processing and a short processing time. The grain size distribution shrinks in the region around 1.5 μ m and this poly-Si film exhibits a strong (111) crystallographic orientation. Poly-Si thin film transistors using these films show quite a high field effect mobility of 440cm2/V · s below 600°C process.


1989 ◽  
Author(s):  
Irving J. Bigio ◽  
Robert C. Sze ◽  
Antoinette J. Taylor ◽  
Robert F. Gibson

Author(s):  
Yousuke Fujimaki ◽  
Makoto Tanaka ◽  
Takashi Itou ◽  
Hirotaka Miyamoto ◽  
Miwa Igarashi ◽  
...  

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