Low Temperature Thin-Film Microelectromechanical Devices on Plastic Substrates

2000 ◽  
Vol 609 ◽  
Author(s):  
M. Boucinha ◽  
P. Brogueira ◽  
V. Chu ◽  
P. Alpuim ◽  
J. P. Conde
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Amorphous Silicon ◽  
Critical Voltage ◽  
Processing Temperature ◽  
Free Standing ◽  
Plastic Substrates ◽  
Microelectromechanical Devices ◽  
Bridge Structures ◽  
Mechanical Actuation

ABSTRACTAir-gap micromachined structures such as bridges and cantilevers were fabricated on 50 and 125 µm-thick polyethylene terephthalate (PET) plastic substrates. The maximum processing temperature using PET is limited to 110 °C. Two surface micromachining processes on PET which used two different sacrificial layers - photoresist and Al - were developed. Several materials were used as structural layers in the microstructures including Al, TiW, amorphous silicon (a-Si:H) and a bilayer of a-Si:H and Al. The maximum length of free-standing bridges and cantilevers is discussed as a function of the fabrication process. The bridge structures were actuated electrostatically, in a DC switch setup configuration, and the critical voltage as a function of the length was measured. Mechanical actuation and optical detection were used, in an AC mode, for the measurement of the resonance frequency of bridge structures.

Reaction Processes for Low Temperature (<150°C) Plasma Enhanced Deposition of Hydrogenated Amorphous Silicon Thin-Film Transistors on Transparent Plastic Substrates

1998 ◽  
Vol 508 ◽  
Author(s):  
Gregory N. Parsons ◽  
Chien-Sheng Yang ◽  
Tonya M. Klein ◽  
Laura Smith
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Low Temperature ◽  
Amorphous Silicon ◽  
Charge Trapping ◽  
Rf Plasma ◽  
Processing Temperature ◽  
Silicon Thin Film ◽  
Transparent Plastic ◽  
Plastic Substrates

AbstractThis article presents mechanisms for low temperature (<150°C) rf plasma enhanced chemical vapor deposition of silicon and silicon nitride thin films that lead to sufficient electronic quality for thin film transistor (TFT) fabrication and operation. For silicon deposition, hydrogen abstraction and etching, and silicon disproportionation reactions are identified that can lead to optimized hydrogen concentration and bonding environments at <150°C. Nitrogen dilution of SiH4/NH3 mixtures during silicon nitride deposition at low temperatures helps promote N-H bonding, leading to reduced charge trapping. Good quality amorphous silicon TFT's fabricated with a maximum processing temperature of 110 °C are demonstrated on flexible transparent plastic substrates. Transistors formed with the same process on glass and plastic show linear mobilities of 0.33 and 0.12 cm2/Vs, respectively, with ION/IOFF ratios > 106.

Reaction Processes for Low Temperature (<150°C) Plasma Enhanced Deposition of Hydrogenated Amorphous Silicon Thin Film Transistors on Transparent Plastic Substrates

1998 ◽  
Vol 507 ◽  
Author(s):  
Gregory N. Parsons ◽  
Chien-Sheng Yang ◽  
Tonya M. Klein ◽  
Laura Smith
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Low Temperature ◽  
Amorphous Silicon ◽  
Charge Trapping ◽  
Rf Plasma ◽  
Processing Temperature ◽  
Silicon Thin Film ◽  
Transparent Plastic ◽  
Plastic Substrates

ABSTRACTThis article presents mechanisms for low temperature (<150°C) rf plasma enhanced chemical vapor deposition of silicon and silicon nitride thin films that lead to sufficient electronic quality for thin film transistor (TFT) fabrication and operation. For silicon deposition, hydrogen abstraction and etching, and silicon disproportionation reactions are identified that can lead to optimized hydrogen concentration and bonding environments at <150°C. Nitrogen dilution of SiH4/NH3 mixtures during silicon nitride deposition at low temperatures helps promote N-H bonding, leading to reduced charge trapping. Good quality amorphous silicon TFT's fabricated with a maximum processing temperature of 110°C are demonstrated on flexible transparent plastic substrates. Transistors formed with the same process on glass and plastic show linear mobilities of 0.33 and 0.12 cm2/Vs, respectively, with ION/IOFF ratios > 106.

Self-aligned Amorphous Silicon Thin Film Transistors with Mobility above 1 cm2V−1s−1fabricated at 300°C on Clear Plastic Substrates

2008 ◽  
Vol 1066 ◽  
Author(s):  
Kunigunde H Cherenack ◽  
Alex Z Kattamis ◽  
Bahman Hekmatshoar ◽  
James C Sturm ◽  
Sigurd Wagner
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Fabrication Process ◽  
Plastic Substrate ◽  
Silicon Thin Film ◽  
Free Standing ◽  
Plastic Substrates ◽  
Effective Mobility ◽  
Clear Plastic

ABSTRACTWe have developed a fabrication process for amorphous-silicon thin-film transistors (a-Si:H TFTs) on free-standing clear plastic substrates at temperatures up to 300°C. The 300°C fabrication process is made possible by using a unique clear plastic substrate that has a very low coefficient of thermal expansion (CTE < 10ppm/°C) and a glass transition temperature higher than 300°C. Our TFTs have a conventional inverted-staggered gate back-channel passivated geometry, which we designed to achieve two goals: accurate overlay alignment and a high effective mobility. A requirement that becomes particularly difficult to meet in the making of TFT backplanes on plastic foil at 300°C is minimizing overlay misalignment. Even though we use a substrate that has a relatively low CTE, accurately aligning the TFTs on the free-standing, 70-micrometer thick substrate is challenging. To deal with this immediate challenge, and to continue developing processes for free-standing web substrates, we are introducing techniques for self-alignment to our TFT fabrication process. We have self-aligned the channel to the gate by exposing through the clear plastic substrate. To raise the effective mobility of our TFTs we reduced the series resistance by decreasing the thickness of the amorphous silicon layer between the source-drain contacts and the accumulation layer in the channel. The back-channel passivated structure allows us to decrease the thickness of the a-Si:H active layer down to around 20nm. These changes have enabled us to raise the effective field effect mobility on clear plastic to values above 1 cm2V−1s−1

Cross-linked poly(hydroxy imide) gate-insulating materials for low-temperature processing of organic thin-film transistors

2018 ◽  
Vol 6 (48) ◽  
pp. 13359-13366 ◽  
Author(s):  
Joo-Young Kim ◽  
Ji Whan Kim ◽  
Eun Kyung Lee ◽  
Jeong-Il Park ◽  
Bang-Lin Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Breakdown Voltage ◽  
Thin Film Transistors ◽  
Organic Thin Film Transistors ◽  
Organic Thin Film ◽  
Insulating Materials ◽  
Plastic Substrates ◽  
Insulating Material ◽  
Low Temperature Processing

This paper reports a polymeric gate insulating material of poly(hydroxy imide) cured at the low temperature of 130 °C for the application to organic thin-film transistors on plastic substrates exhibiting high breakdown voltage and no hysteresis.

Low-Temperature Cross-Linking Benzocyclobutene Based Polymer Dielectric for Organic Thin Film Transistors on Plastic Substrates

2019 ◽  
Vol 85 (1) ◽  
pp. 277-283 ◽  
Author(s):  
Rawad K. Hallani ◽  
Maximilian Moser ◽  
Helen Bristow ◽  
Maud V. C. Jenart ◽  
Hendrik Faber ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Organic Thin Film Transistors ◽  
Cross Linking ◽  
Organic Thin Film ◽  
Plastic Substrates ◽  
Polymer Dielectric

scholarly journals An ‘aqueous route’ for the fabrication of low-temperature-processable oxide flexible transparent thin-film transistors on plastic substrates

2013 ◽  
Vol 5 (4) ◽  
pp. e45-e45 ◽  
Author(s):  
Young Hwan Hwang ◽  
Jin-Suk Seo ◽  
Je Moon Yun ◽  
HyungJin Park ◽  
Shinhyuk Yang ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Plastic Substrates

High Performance Hydrogenated Amorphous Silicon n-i-p Photo-diodes on Glass and Plastic Substrates by Low-temperature Fabrication Process

2007 ◽  
Vol 989 ◽  
Author(s):  
Kyung Ho Kim ◽  
Yuriy Vygranenko ◽  
Mark Bedzyk ◽  
Jeff Hsin Chang ◽  
Tsu Chiang Chuang ◽  
...  
Keyword(s):  
Low Temperature ◽  
Amorphous Silicon ◽  
High Performance ◽  
Hydrogenated Amorphous Silicon ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Plastic Substrate ◽  
Process Conditions ◽  
Plastic Substrates ◽  
Hydrogenated Amorphous

AbstractWe report on the fabrication and characterization of hydrogenated amorphous silicon (a-Si:H) films and n-i-p photodiodes on glass and PEN plastic substrates using low-temperature (150°C) plasma-enhanced chemical vapor deposition. Process conditions were optimized for the i-a-Si:H material which had a band gap of ~1.73 eV and low density of states (of the order 1015 cm-3). Diodes with 0.5 μm i-layer demonstrate quantum efficiency ~70%. The reverse dark current of the diodes on glass and PEN plastic substrate is ~10-11 and below 10-10 A/cm2, respectively. We discuss the difference in electrical characteristics of n-i-p diodes on glass and PEN in terms of bulk- and interface-state generation currents.

scholarly journals Amorphous silicon thin film solar cells deposited entirely by hot-wire chemical vapour deposition at low temperature (<150 °C)

2009 ◽  
Vol 517 (12) ◽  
pp. 3575-3577 ◽  
Author(s):  
Fernando Villar ◽  
Aldrin Antony ◽  
Jordi Escarré ◽  
Daniel Ibarz ◽  
Rubén Roldán ◽  
...  
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Low Temperature ◽  
Amorphous Silicon ◽  
Chemical Vapour Deposition ◽  
Vapour Deposition ◽  
Chemical Vapour ◽  
Thin Film Solar Cells ◽  
Hot Wire ◽  
Silicon Thin Film
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