Deposition and Characterization of In-Situ Boron Doped Polycrystalline Silicon Films for Microelectromechanical Systems Applications

1999 ◽  
Vol 605 ◽  
Author(s):  
J. J. McMahon ◽  
J. J. McMahon ◽  
J. M. Melzak ◽  
C. A. Zorman ◽  
J. Chung ◽  
...  
Keyword(s):  
Polycrystalline Silicon ◽  
Microelectromechanical Systems ◽  
Single Step ◽  
Boron Doped ◽  
Polysilicon Films ◽  
Polycrystalline Silicon Films ◽  
P Type ◽  
Deposition Conditions

AbstractIn an effort to develop thick, p-type polycrystalline silicon (polysilicon) films for microelectromechanical systems (MEMS) applications, in-situ boron-doped polysilicon films were deposited by a single-step APCVD process at susceptor temperatures ranging from 700°C to 955°C. The process produces boron-doped films at a deposition rate of 73 nm/min at 955°C. Spreading resistance measurements show that the boron doping level is constant at 2 × 1019 /cm3 throughout the thickness of the films. Doped films deposited at the low temperatures exhibit compressive stress as high as 666 Mpa; however films deposited at 955°C exhibited stress as low as 130 MPa. TEM and XRD show that the microstructure strongly depends on the deposition conditions. Surface micromachined, singly clamped cantilevers and strain gauges were successfully fabricated and used to characterize the residual stress of 5.0 µm-thick doped films deposited at a susceptor temperature of 955°C.

Polycrystalline Silicon Films for Microelectromechanical Devices

1995 ◽  
Vol 403 ◽  
Author(s):  
H. Kahn ◽  
S. Stemmer ◽  
R. L. Mullen ◽  
M. A. Huff ◽  
A. H. Heuer
Keyword(s):  
Residual Stress ◽  
Polycrystalline Silicon ◽  
Microelectromechanical Systems ◽  
Device Fabrication ◽  
Process Equipment ◽  
Boron Doped ◽  
Microelectromechanical Devices ◽  
Polysilicon Films ◽  
Polycrystalline Silicon Films

AbstractPolycrystalline silicon is the most widely used structural material for surface micromachined microelectromechanical systems (MEMS). There are many advantages to using thick polysilicon films; however, due to process equipment limitations, these devices are typically fabricated from polysilicon films less than 3 μm thick. In this work, microelectromechanical test structures were designed and processed from thick (up to 10 μm) in situ boron-doped polysilicon films. The elastic modulus of these films was about 150 GPa, independent of film thickness. The thermal oxidation of the polysilicon induced a compressive stress into the top surface of the films, which was detected as a residual stress in the polysilicon after the device fabrication was complete.

Piezoresistive Properties of Boron-Doped PECVD Micro- and Polycrystalline Silicon films

1994 ◽  
Vol 343 ◽  
Author(s):  
M. Le Berre ◽  
M. Lemiti ◽  
D. Barbier ◽  
P. Pinard ◽  
J. Cali ◽  
...  
Keyword(s):  
Polycrystalline Silicon ◽  
Grazing Angle ◽  
Amorphous State ◽  
Silicon Films ◽  
Gauge Factor ◽  
X Ray Diffraction ◽  
Boron Doped ◽  
Polycrystalline Silicon Films ◽  
Oriented Material

ABSTRACTThe electrical and piezoresistive properties of in-situ doped PECVD silicon films deposited on oxided silicon wafers have been investigated. One series of films was deposited in the so-called microcrystalline state at 450°C. The other set of samples was deposited in the amorphous state at 320°C and subjected to rapid thermal annealing. Structural properties (grain size, texture, residual stress) were evaluated experimentally through TEM and grazing angle X ray diffraction and related to the measured gauge factor. A maximum longitudinal gauge factor of 28 is measured in the case of advantageously textured microcrystalline material, the magnitude of the gauge factor decreasing sharply for randomly oriented material. For the amorphous deposited and subsequently annealed material, the longitudinal gauge factor is in the range 22–27 depending on dopant concentration. These experimental features are compared to the results of a theoretical approach of piezoresistance in polysilicon. We derive various expressions of the gauge factor according to the assumptions of either constant stress or constant strain within the aggregate. In the case of untextured films, analytical Voigt-Reuss-Hill averages for the elements of piezoresistive and elastoresistive tensors lead to greatly simplified expressions. Theoretical estimates are shown to be in reasonable agreement with the experimental measurements. This confirms the great potential of PECVD microcrystalline and polycrystalline silicon for strain gauges.

Micromechanical and tribological characterization of doped single-crystal silicon and polysilicon films for microelectromechanical systems devices

1997 ◽  
Vol 12 (1) ◽  
pp. 54-63 ◽  
Author(s):  
Bharat Bhushan ◽  
Xiaodong Li
Keyword(s):  
Single Crystal ◽  
Microelectromechanical Systems ◽  
Single Crystal Silicon ◽  
Crystal Silicon ◽  
Polysilicon Film ◽  
Type Silicon ◽  
Boron Doped ◽  
Polysilicon Films ◽  
Tribological Characterization

Microelectromechanical systems (MEMS) devices are made of doped single-crystal silicon, LPCVD polysilicon films, and other ceramic films. Very little is understood about tribology and mechanical characterization of these materials on micro- to nanoscales. Micromechanical and tribological characterization of p-type (lightly boron-doped) single-crystal silicon (referred to as “undoped”), p+-type (boron doped) single-crystal silicon, polysilicon bulk, and n+-type (phosphorous doped) LPCVD polysilicon films have been carried out. Hardness, elastic modulus, and scratch resistance of these materials were measured by nanoindentation and microscratching using a nanoindenter. Friction and wear properties were measured using an accelerated ball-on-flat tribometer. It is found that the undoped silicon and polysilicon bulk as well as n+-type polysilicon film exhibit higher hardness and elastic modulus than the p+-type silicon. The polysilicon bulk and n+-type polysilicon film exhibit the lowest friction and highest resistance to scratch and wear followed by the undoped silicon and with the poorest behavior of the p+-type silicon. During scratching, the p+-type silicon deforms like a ductile metal.

Effects of the Grain Size on the Electrical Properties of Boron-Doped Polysilicon Films

1990 ◽  
Vol 182 ◽  
Author(s):  
A. Kobayashi ◽  
S. Baba ◽  
A. Kinbara ◽  
H. Akimori ◽  
M. Kawaji ◽  
...  
Keyword(s):  
Grain Size ◽  
Electrical Properties ◽  
Polycrystalline Silicon ◽  
Temperature Curve ◽  
Acceptor Level ◽  
Boron Doped ◽  
Average Grain Size ◽  
Polysilicon Films ◽  
Polycrystalline Silicon Films ◽  
Boron Acceptor

AbstractThe electrical properties have been investigated on boron-doped polycrystalline silicon films with the average grain size of 50 nm and of 370 nm. It is shown that Hall mobility is strongly dependent on the grain size, and the temperature dependence is changed by hydrogenplasma treatment (HPT).After the treatment in the larger grain film, the mobility of about 40 cm2/V sec is obtained and it shows the boron acceptor level of 0.043 eV, which is almost the same as that of the level in monocrystalline silicon. A kink in the mobility vs temperature curve which is observed in the smaller grain film disappears by HPT.These phenomena will be discussed in relation to the density of the trapping states at the grain boundary of the films.

Mechanical Properties of Thermally Crystallized Boron-Doped Silicon Thin Films

1995 ◽  
Vol 403 ◽  
Author(s):  
P. Scafidi ◽  
J. Cali ◽  
E. Bustarret
Keyword(s):  
Elastic Modulus ◽  
Internal Stress ◽  
Polycrystalline Silicon ◽  
Boron Concentration ◽  
Hydrogenated Silicon ◽  
Silicon Thin Films ◽  
Boron Doped ◽  
Amorphous Hydrogenated Silicon ◽  
Polycrystalline Silicon Films ◽  
P Type

AbstractP-type polycrystalline silicon films on silicon wafers were obtained by annealing at 575 °C boron-doped amorphous hydrogenated silicon (a-Si:H) films. During the anneal, the internal stress of the film changed from compression to tension. The crystallization kinetics became faster when increasing the boron concentration. The hardness and elastic modulus of each film were determined by nanoindentation. The elastic modulus increased systematically upon crystallization. Wafer curvature monitoring during the thermal cycle allowed us to derive the thermal expansion coefficient of a-Si:H for different boron doping levels. Above a critical temperature of 320°C, the internal stress of the a-Si:H films rapidly changed toward a tensile state, independent of the boron concentration. Analysis of the hydrogen-bonding configurations by Fourier transform infrared spectroscopy indicated that this rapid stress change was due to hydrogen out-diffusion. The evolution of the internal stress with time was followed during the 575°C crystallization isothermal plateau. The circular blistering and spalling observed upon annealing in some cases of low doping levels was correlated with the presence of microvoids and with the internal stress of the a-Si:H film.

Interface morphology of thermal oxide grown on polycrystalline silicon by different processes

1992 ◽  
Vol 50 (2) ◽  
pp. 1396-1397
Author(s):  
H. Yen ◽  
E. P. Kvam ◽  
R. Bashir ◽  
S. Venkatesan ◽  
G. W. Neudeck
Keyword(s):  
Integrated Circuits ◽  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Interface Morphology ◽  
Oxide Interface ◽  
Poly Silicon ◽  
Thermal Oxide ◽  
Grain Orientations ◽  
Polycrystalline Silicon Films ◽  
P Type

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.

A p-Type PbS Quantum Dot Ink with Improved Stability for Solution Processable Optoelectronics

2021 ◽  
Author(s):  
Fiaz Ahmed ◽  
John Hardin Dunlap ◽  
Perry J. Pellechia ◽  
Andrew Greytak
Keyword(s):  
Quantum Dot ◽  
Ligand Exchange ◽  
Chemical Characterization ◽  
Single Step ◽  
Improved Stability ◽  
Solution Processable ◽  
P Type ◽  
Pbs Quantum Dot

A highly stable p-type PbS-QDs ink is prepared using a single-step biphasic ligand exchange route, overcoming instability encountered in previous reports. Chemical characterization of the ink reveals 3-mercaptopriopionic acid (MPA)...

Low-Temperature LPCVD MEMS Technologies

2002 ◽  
Vol 729 ◽  
Author(s):  
Roger T. Howe ◽  
Tsu-Jae King
Keyword(s):  
Silicon Germanium ◽  
Polycrystalline Silicon ◽  
Rf Mems ◽  
Sige Layer ◽  
Copper Metallization ◽  
Si Films ◽  
P Type ◽  
Mems Process ◽  
Post Deposition

AbstractThis paper describes recent research on LPCVD processes for the fabrication of high-quality micro-mechanical structures on foundry CMOS wafers. In order to avoid damaging CMOS electronics with either aluminum or copper metallization, the MEMS process temperatures should be limited to a maximum of 450°C. This constraint rules out the conventional polycrystalline silicon (poly-Si) as a candidate structural material for post-CMOS integrated MEMS. Polycrystalline silicon-germanium (poly-SiGe) alloys are attractive for modular integration of MEMS with electronics, because they can be deposited at much lower temperatures than poly-Si films, yet have excellent mechanical properties. In particular, in-situ doped p-type poly-SiGe films deposit rapidly at low temperatures and have adequate conductivity without post-deposition annealing. Poly-Ge can be etched very selectively to Si, SiGe, SiO2 and Si3N4 in a heated hydrogen peroxide solution, and can therefore be used as a sacrificial material to eliminate the need to protect the CMOS electronics during the MEMS-release etch. Low-resistance contact between a structural poly-SiGe layer and an underlying CMOS metal interconnect can be accomplished by deposition of the SiGe onto a typical barrier metal exposed in contact windows. We conclude with directions for further research to develop poly-SiGe technology for integrated inertial, optical, and RF MEMS applications.

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