Challenges in Interface Trap Characterization of Deep Sub-Micron MOS Devices Using Charge Pumping Techniques

ABSTRACTThis work surveys some of our recent experimental and theoretical advances in charge pumping for the electrical characterization of interface traps present in MOSFET architectures. The first part of this paper is devoted to an improved time-domain analysis of the charge pumping phenomenon. This approach presents the main advantage to use the same formalism to describe the charge pumping contribution of a single trap or a continuum of traps at the Si-SiO2 interface. The implications for deepsubmicron MOSFET characterization are illustrated. Some experimental aspects are then presented, including the adaptation of the technique to ultra-thin oxides, non-planar oxides and DRAM memory cells. Finally, recent charge pumping characterization results are reported concerning the electrical behavior of the Si-SiO2 interface submitted to particular technological treatments, electrical and radiation stresses, or post-degradation anneals.