Effects of Various Hydrogen Dilution Ratios on the Performance of Thin Film Nanocrystalline/Crystalline Silicon Solar Cells

1998 ◽  
Vol 536 ◽  
Author(s):  
Y. J. Song ◽  
W. A. Anderson
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Electron Cyclotron Resonance ◽  
Crystalline Silicon ◽  
Low Cost ◽  
Silicon Film ◽  
Chemical Vapor ◽  
Nanocrystalline Silicon ◽  
Maximum Efficiency ◽  
Crystalline Silicon Solar Cells

AbstractLow temperature growth of hydrogenated nanocrystalline silicon film (nc-Si:H) by microwave electron cyclotron resonance chemical vapor deposition has been performed employing a double dilution of silane, using a He carrier for SiH4 and its subsequent dilution by H2. A series of Raman spectra and AFM pictures has shown that a very thin (<100Å) nc-Si:H layer initially grown with high H2 dilution on a glass substrate can serve as a seed layer for the subsequent growth of the film with lower H2 dilution, which results in a higher crystallinity of the whole film. The role of this thin layer in low temperature junction formation has been examined by the insertion of the layer between the interface of both nc-Si:H (deposited with lower H2 dilution)/c-Si and a-Si:H/c-Si heterojunction type photovoltaic cells. This is to address the knowledge that the device's performance is strongly influenced by the quality of the thin film silicon/crystalline silicon interface. Various thicknesses and H2 dilution ratios have been used to find the optimized condition providing the best performance of the cells. The maximum efficiency of 10.5% (Jsc=35.1mA/cm2, Voc=0.51V and FF=0.59) has been obtained, without an AR coating, by the successive deposition of nc-Si:H film with four different H2 dilution ratios on a crystalline silicon substrate. This is potentially a low-temperature, low-cost solar cell fabrication process.

Hydrogen in Ultralow Temperature SiO2for Nanocrystalline Silicon Thin Film Transistors

2004 ◽  
Vol 814 ◽  
Author(s):  
Alex Kattamis ◽  
I-Chun Cheng ◽  
Steve Allen ◽  
Sigurd Wagner
Keyword(s):  
Thin Film ◽  
Leakage Current ◽  
Current Density ◽  
Thin Film Transistors ◽  
Secondary Ion Mass Spectrometry ◽  
Crystalline Silicon ◽  
Chemical Vapor ◽  
Nanocrystalline Silicon ◽  
Film Deposition ◽  
Silicon Thin Film

AbstractNanocrystalline silicon is a candidate material for fabricating thin film transistors with high carrier mobilities on plastic substrates. A major issue in the processing of nanocrystalline silicon thin film transistors (nc-Si:H TFTs) at ultralow temperatures is the quality of the SiO2gate dielectric. SiO2deposited at less than 250°C by radio frequency plasma enhanced chemical vapor deposition (rf-PECVD), and not annealed at high temperature after deposition, exhibits high leakage current and voltage shifts when incorporated into TFT's. Secondary ion mass spectrometry (SIMS) measurements show that the hydrogen concentration (NH) in PECVD oxide deposited at 150°C on crystalline silicon (x-Si) is ∼ 0.8 at. %. This is much higher than in thermal oxides on x-Si, which display concentrations of less than 0.003 at. %. The leakage current density for thermal oxides on x-Si at a bias of 10 V is ∼9×10−6A/cm2whereas for 200°C PECVD oxides on nc-Si:H the current is ∼1×10−4A/cm2. As the temperature of the SiO2deposition is reduced to 150°C the current density rises by up to two orders of magnitude more. The H which is suspected to cause the leakage current across the PECVD oxide originates from the nc-Si:H substrate and the SiH4source gas. We analyzed the 300-nm gate oxide in capacitor structures of Al / SiO2/n+nc-Si:H / Cr / glass, Al / SiO2/ n+nc-Si:H / x-Si, and Al / SiO2/ x-Si. Vacuum annealing the nc-Si:H prior to PECVD of the oxide drives H out of the nc-Si:H film and reduces the amount of H incorporated into the oxide that is deposited on top. SiO2film deposition from SiH4and N2O at high He dilution has a still greater effect on lowering NH. The leakage current at a 10 V bias dropped from ∼1×10−4A/cm2to about ∼2×10−6A/cm2using He dilution at 250°C, and the vacuum anneal of the nc-Si:H lowered it by an additional factor of two. Thus we observe that both the nc-Si:H anneal and the SiO2deposition at high He dilution lessen the gate leakage current.

Laser Doping and Recrystallization for Amorphous Silicon Films by Plasma-Enhanced Chemical Vapor Deposition

2005 ◽  
Vol 475-479 ◽  
pp. 3791-3794
Author(s):  
Dong Sing Wuu ◽  
Shui Yang Lien ◽  
Jui Hao Wang ◽  
Hsin-Yuan Mao ◽  
In-Cha Hsieh ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Polycrystalline Silicon ◽  
Laser Annealing ◽  
Crystalline Silicon ◽  
Low Cost ◽  
Sol Gel ◽  
Silicon Film ◽  
Chemical Vapor ◽  
Silicon Thin Film ◽  
Laser Doping

One of the most challenging problems to develop polycrystalline silicon thin-film solar cells is the growth of crystalline silicon on foreign, low-cost and low-temperature substrates. In this paper, a laser doping technique was developed for the plasma-deposited amorphous silicon film. A process combination of recrystallization and dopant diffusion (phosphorous or boron) was achieved simultaneously by the laser annealing process. The doping precursor was synthesized by a sol-gel method and was spin-coated on the sample. After laser irradiation, the grain size of the doped polycrystalline silicon was examined to be about 0.5~1.0 µm. The concentrations of 2×1019 and 5× 1018 cm-3 with Hall mobilities of 92.6 and 37.5 cm²/V-s were achieved for the laser-diffused phosphorous- and boron-type polysilicon films, respectively.

scholarly journals Low Temperature (180°C) Growth of Smooth Surface Germanium Epilayers on Silicon Substrates Using Electron Cyclotron Resonance Chemical Vapor Deposition

2014 ◽  
Vol 2014 ◽  
pp. 1-8 ◽  
Author(s):  
Teng-Hsiang Chang ◽  
Chiao Chang ◽  
Yen-Ho Chu ◽  
Chien-Chieh Lee ◽  
Jenq-Yang Chang ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Vapor Deposition ◽  
Cyclotron Resonance ◽  
Smooth Surface ◽  
High Efficiency ◽  
Electron Cyclotron Resonance ◽  
Low Cost ◽  
Chemical Vapor ◽  
Electron Cyclotron

This paper describes a new method to grow thin germanium (Ge) epilayers (40 nm) on c-Si substrates at a low growth temperature of 180°C using electron cyclotron resonance chemical vapor deposition (ECR-CVD) process. The full width at half maximum (FWHM) of the Ge (004) in X-ray diffraction pattern and the compressive stain in a Ge epilayer of 683 arcsec and 0.12% can be achieved. Moreover, the Ge/Si interface is observed by transmission electron microscopy to demonstrate the epitaxial growth of Ge on Si and the surface roughness is 0.342 nm. The thin-thickness and smooth surface of Ge epilayer grown on Si in this study is suitable to be a virtual substrate for developing the low cost and high efficiency III-V/Si tandem solar cells in our opinion. Furthermore, the low temperature process can not only decrease costs but can also reduce the restriction of high temperature processes on device manufacturing.

Poly and Nano-crystalline High Electron Mobility Thin Film Transistors on Plastic Substrates for Large Area Applications

2007 ◽  
Vol 1030 ◽  
Author(s):  
Sara Paydavosi ◽  
Amir-Hossein Tamaddon ◽  
Shams Mohajerzadeh ◽  
Michael D Robertson
Keyword(s):  
Thin Film ◽  
Electron Mobility ◽  
Thin Film Transistors ◽  
Crystalline Silicon ◽  
Silicon Film ◽  
Chemical Vapor ◽  
Rf Plasma ◽  
High Electron ◽  
Large Area ◽  
Nano Crystalline

AbstractThin-film transistors (TFT) of poly and nano crystalline silicon have been made at temperature as low as 170°C on flexible PET (polyethylene terephthalate) substrates.The crystallization of the silicon film has been achieved using external mechanical stress assisted by a plasma hydrogenation technique. The formation of TFT is possible by means of a lateral crystallization of amorphous silicon under the channel region. High mobility TFTs with an electron mobility of 25cm2/Vs and an on/off ratio of 2000 have been obtained. Scanning electron microscopy, X-ray diffraction analysis and optical microscopy have been used to examine the crystallinity of the layer. In addition we report the deposition of high quality low-temperature silicon-oxide layers on PET substrates using an RF-plasma enhanced chemical vapor deposition unit with direct introduction of oxygen gas into the chamber and its reaction with Silane. Infrared spectroscopy was used to examine the quality of the oxide layer.

scholarly journals A Phase Diagram for Morphology and Properties of Low Temperature Deposited Polycrystalline Silicon Grown by Hot-wire Chemical Vapor Deposition

2004 ◽  
Vol 808 ◽  
Author(s):  
Christine E. Richardson ◽  
Maribeth S. Mason ◽  
Harry A. Atwater
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Vapor Deposition ◽  
Polycrystalline Silicon ◽  
Crystalline Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
High Energy ◽  
Hot Wire

ABSTRACTThe fabrication of low temperature polycrystalline silicon with lifetimes close to single crystalline silicon, but with internal surface passivation similar to that observed in deposited microcrystalline silicon, is a promising direction for thin film polycrystalline silicon photovoltaics. To achieve this, large grains with passivated grain boundaries and intragranular defects are required. We investigate the low-temperature (250-550°C) epitaxial growth of thin silicon films by hot-wire chemical vapor deposition (HWCVD) on Si(100) substrates and large-grained polycrystalline silicon template layers formed by selective nucleation and solid phase epitaxy (SNSPE). Using reflection high energy electron diffraction (RHEED) and transmission electron microscopy (TEM), we have observed epitaxial, twinned epitaxial, mixed epitaxial/polycrystalline and polycrystalline phases in the 50 nm–15 μm thickness regime. HWCVD growth on Si(100) was performed using a mixture of diluted silane (4% in He) and hydrogen at a H2/SiH4 ratio of 50:1 at substrate temperatures from 300–475°C. We will discuss the relationship between the microstructure and photoconductive decay lifetimes of these undoped layers on Si(100) and SNSPE templates as well as their suitability for use in thin-film photovoltaic applications.

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