Impact of Silicon Wafer Material on Dislocation Generation in Local Oxidation

1998 ◽  
Vol 532 ◽  
Author(s):  
I. V. Peidous ◽  
R. Sundaresan ◽  
E. Quek ◽  
Y. K. Leung ◽  
M. Beh
Keyword(s):  
Surface Defect ◽  
Depth Distribution ◽  
Defect Density ◽  
Dislocation Generation ◽  
Local Oxidation ◽  
Dislocation Movement ◽  
Defect Nucleation ◽  
Critical Resolved Shear Stress ◽  
Induced Dislocation

ABSTRACTCrystalline quality of locally oxidized silicon wafers has been studied. Wafers from different supply sources were found to be differently susceptible to stress-induced dislocation generation, although they had been produced to the same specification. On the basis of the analysis of a depth distribution of the dislocations, critical resolved shear stress of dislocation movement in the bulk areas of the wafers was determined. It varied from about 1.65 to 5.12 MPa and correlated positively to the surface defect density. The results show that uncontrollable variations of bulk silicon properties may significantly influence the stress-induced defect nucleation on the surface of wafers during processing.

Edge Effects of Nitride Film Patterning on Dislocation Generation in Local Oxidation of Silicon

1998 ◽  
Vol 510 ◽  
Author(s):  
I. V. Peidous ◽  
R. Sundaresan ◽  
E. Quek ◽  
C. K. Lau
Keyword(s):  
Strong Dependence ◽  
Surface Damage ◽  
Wafer Surface ◽  
Nitride Film ◽  
Strongly Correlated ◽  
Leakage Currents ◽  
Dislocation Generation ◽  
Silicon Nitride Films ◽  
Local Oxidation ◽  
Defect Nucleation

AbstractExtensive monitoring of device characteristics in the manufacturing of ULSI with advanced LOCOS isolation revealed the strong dependence of device leakage currents on the process of patterning of silicon nitride films applied as a hard mask for local oxidation of silicon wafers. At the same time, the level of the leakage currents strongly correlated to stress-induced dislocation density in the device structures. Formation of microtrenches on the wafer surface at the nitride film edges was identified to have a major impact on the leakage currents. Surprisingly, structures having nitride film edge profiles with feet were consistently dislocation-free after the local oxidation. This showed that nitride etching process created surface damage that provided effective sites for crystal defect nucleation in silicon at the film edges. Computer simulations demonstrated that the feet at nitride edges substantially suppress stress growth during local oxidation.

Local oxidation induced dislocation generation near [100] Si3N4film edges

1983 ◽  
Vol 43 (12) ◽  
pp. 1120-1122 ◽  
Author(s):  
J. Vanhellemont ◽  
J. Van Landuyt ◽  
S. Amelinckx ◽  
C. Claeys ◽  
G. Declerck ◽  
...  
Keyword(s):  
Dislocation Generation ◽  
Local Oxidation ◽  
Induced Dislocation

Improvement of 4H-SiC Epitaxial Layers Grown on 2o Offcut Si-Face Substrates

2016 ◽  
Vol 858 ◽  
pp. 133-136 ◽  
Author(s):  
Hirokuni Asamizu ◽  
Keiichi Yamada ◽  
Kentaro Tamura ◽  
Chiaki Kudou ◽  
Johji Nishio ◽  
...  
Keyword(s):  
Surface Defect ◽  
Defect Density ◽  
Growth Parameters ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Epitaxial Layers ◽  
Lower Growth ◽  
Wafer Size ◽  
Lower Growth Temperature

The surface quality of epitaxial layers grown on 2° offcut substrates was improved. These substrates require a lower growth temperature and a lower C/Si ratio than their 4° offcut counterparts to suppress macro step bunching. Surface morphology, triangular defect density, and doping uniformity presented a trade-off relationship with respect to growth parameters. The implementation of a low C/Si ratio buffer layer led to a balance between surface defect density, which reached a minimum of 0.2 cm−2, and good doping uniformity on an equivalent wafer size (150 mm). An evaluation of metal–oxide–semiconductor capacitors and Schottky barrier diodes fabricated on 2° offcut epitaxial layers showed that the quality of these epitaxial layers was satisfactory for application in devices.

Controlling the Cytotoxicity of CdSe Magic-Sized Quantum Dots as a Function of Surface Defect Density

Nano Letters ◽  
2014 ◽  
Vol 14 (9) ◽  
pp. 5452-5457 ◽  
Author(s):  
Anielle Christine Almeida Silva ◽  
Marcelo José Barbosa Silva ◽  
Felipe Andrés Cordero da Luz ◽  
Danielle Pereira Silva ◽  
Samantha Luara Vieira de Deus ◽  
...  
Keyword(s):  
Quantum Dots ◽  
Surface Defect ◽  
Defect Density ◽  
Surface Defect Density

scholarly journals Depth distribution of irradiation-induced dislocation loops in an Fe-9Cr model alloy irradiated with Fe ions: The effect of ion energy

2021 ◽  
Vol 27 ◽  
pp. 101007
Author(s):  
K. Vogel ◽  
P. Chekhonin ◽  
C. Kaden ◽  
M. Hernández-Mayoral ◽  
S. Akhmadaliev ◽  
...  
Keyword(s):  
Depth Distribution ◽  
Model Alloy ◽  
Dislocation Loops ◽  
Ion Energy ◽  
Fe Ions ◽  
Induced Dislocation

Defect Reduction and Defect Engineering in Silicon-on-Sapphire Material Using Ge Implantation

1990 ◽  
Vol 201 ◽  
Author(s):  
F. Namavar ◽  
E. Cortesi ◽  
N. M. Kalkhoran ◽  
J. M. Manke ◽  
B. L. Buchanan
Keyword(s):  
Leakage Current ◽  
Defect Density ◽  
Solid Phase ◽  
Substantial Reduction ◽  
Interface Region ◽  
Radiation Environment ◽  
Solid Phase Epitaxy ◽  
Defect Reduction ◽  
Radiation Induced

AbstractSubstantial reduction of defect density in silicon-on-sapphire (SOS) material is required to broaden its range of applications to include CMOS and bipolar devices. In recent years, solid phase epitaxy and regrowth (SPEAR) and double solid phase epitaxy (DSPE) processes were applied to SOS to reduce the density of defects in the silicon. These methods result in improved carrier mobilities, but also in increased leakage current, even before irradiation. In a radiation environment, this material has a large increase in radiation induced back channel leakage current as compared to standard wafers. In other words, the radiation hardness quality of the SOS declines when the crystalline quality of the Si near the sapphire interface is improved.In this paper, we will demonstrate that Ge implantation, rather than Si implantation normally employed in DSPE and SPEAR processes, is an efficient and more effective way to reduce the density of defects near the surface silicon region without improving the Si/sapphire interface region. Ge implantation may be used to engineer defects in the Si/sapphire interface region to eliminate back channel leakage problems.

scholarly journals Energy analysis of image descriptors in texture classification

2021 ◽  
Author(s):  
Faeze Kiani
Keyword(s):  
Surface Defect ◽  
Energy Analysis ◽  
Texture Classification ◽  
Medical Image Analysis ◽  
Image Description ◽  
Image Descriptors ◽  
Discriminative Feature ◽  
Surface Defect Detection ◽  
Occurrence Matrix

Texture play important role in image description process. Texture classification is one of the problems which have been paid much attention on by computer vision scientists in last decade. If texture classification is done accurately, it can be used in many problems such as skin detection, surface defect detection, medical image analysis, gender identification, human identification, etc. Since now, many approaches are proposed to perform it. Most of them have tried to extract discriminative features to separate different texture types accurately. This paper has proposed an approach based on energy analysis of some efficient image descriptors such as median binary pattern, Local binary pattern and Gray Level Co-occurrence matrix. Next, by concatenating extracted features, a discriminative feature vector is defined. Finally, classifier is used to classify texture types. Although, this approach is a general one and is could be used in different applications. In the result part the proposed approach has been evaluated on some benchmark dataset. Next, the results have been compared with some of state-of-the-art approaches to prove the quality of the proposed approach.

Homoepitaxial Chemical Vapor Deposition of up to 150 μm Thick 4H-SiC Epilayers in a 10×100 mm Batch Reactor

2016 ◽  
Vol 858 ◽  
pp. 129-132 ◽  
Author(s):  
Bernd Thomas ◽  
Jie Zhang ◽  
Gil Yong Chung ◽  
Willie Bowen ◽  
Victor Torres ◽  
...  
Keyword(s):  
Carrier Lifetime ◽  
Statistical Data ◽  
Laser Light ◽  
Defect Density ◽  
Batch Reactor ◽  
Chemical Vapor ◽  
Layer Growth ◽  
Average Lifetime ◽  
Thick Layers

In this paper we present results on the growth of low-doped thick epitaxial layers on 4° off-oriented 4H-SiC using a warm-wall multi-wafer CVD system (Aixtron VP2800WW). Statistical data on doping and thickness of 25 μm to 40 μm layer growth show results similar to standard epilayer growth (5-15 μm). Improvements in thickness and doping uniformity as well as the reduction of epitaxial defects has boosted the quality of 25 μm to 40 μm thick epilayers. Laser light scattering measurements resulted in projected device yields with median values of 83% and 96% for 5×5 mm2 and 2×2 mm2 die size, respectively. This corresponds to a low epitaxial defect density of < 0.75 cm-2 in 25-40 μm thick epilayers. This paper also presents results of 60 μm to 150 μm thick epitaxial layer growth. Excellent results for doping, thickness and carrier lifetime were achieved. As an example results of a fully loaded 10×100mm run with 150 μm thick epilayers are presented. Wafer-to-wafer doping and thickness values of 3.7 % and 3.4% for sigma/mean were accomplished, respectively. Typical average lifetime values of 5 μs to 6 μs were measured on the 150 μm thick layers without post-epi treatments.

Ge Growth on Nanostructured Silicon Surfaces

2005 ◽  
Vol 862 ◽  
Author(s):  
Ganesh Vanamu ◽  
Abhaya K. Datye ◽  
Saleem H. Zaidi
Keyword(s):  
Electron Microscopy ◽  
Dislocation Density ◽  
Full Width Half Maximum ◽  
Defect Density ◽  
Chemical Vapor ◽  
Silicon Surfaces ◽  
X Ray Diffraction ◽  
Etch Pit ◽  
Transmission Electron

AbstractWe report highest quality Ge epilayers on nanoscale patterned Si structures. 100% Ge films of 10 μm are deposited using chemical vapor deposition. The quality of Ge layers was examined using scanning electron microscopy (SEM), transmission electron microscopy (TEM), and high-resolution x-ray diffraction (HRXRD) measurements. The defect density was evaluated using etch pit density measurements. We have obtained lowest dislocation density (5×105 cm-2) Ge films on the nanopatterned Si structures. The full width half maximum peaks of the reciprocal space maps of Ge epilayers on the nanopatterned Si showed 93 arc sec. We were able to get rid of the crosshatch pattern on the Ge surface grown on the nanopatterned Si. We also showed that there is a significant improvement of the quality of the Ge epilayers in the nanopatterned Si compared to an unpatterned Si. We observed nearly three-order magnitude decrease in the dislocation density in the patterned compared to the unpatterned structures. The Ge epilayer in the patterned Si has a dislocation density of 5×105 cm-2 as compared to 6×108 cm-2 for unpatterned Si.

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