The Use of X-ray Topography to Map Mechanical, Thermomechanical and Wire-Bond Strain Fields in Packaged Integrated Circuits

1997 ◽  
Vol 505 ◽  
Author(s):  
Patrick J. McNally ◽  
R. Rantamäki ◽  
John W. Curley ◽  
T. Tuomi ◽  
A. N. Danilewsky ◽  
...  

ABSTRACTThermal processing steps in the production of packaged integrated circuits can lead to thermomechanical stresses. Additionally, the process of bonding wires to contact pads can lead to strain fields attributable to these. Synchrotron x-ray topography has been applied to packaged EEPROM Si ICs in order to produce maps of the strain fields induced by such processing steps. This technique allows for depth-resolved mapping with resolutions currently in the region of 5–10 μm throughout the entire mapping volume.

1991 ◽  
Vol 225 ◽  
Author(s):  
Thomas Fanning ◽  
Michael Dudley ◽  
Franklyn F.Y. Wang ◽  
David Gordon-Smith ◽  
David T. Hodul

ABSTRACTCzochralski (CZ) grown Si wafers, specially prepared with unusually high carbon content (ranging from 3 to 7 ppma), were subjected to a rapid thermal processing (RTP) treatment at 1050°C for 60s. Synchrotron white beam x-ray topography in transmission geometry was used to study defect structures in these Si wafers, both prior and subsequent to this RTP treatment. Observations of both the partial relaxation of the strain fields of precipitates and widespread nucleation and propagation of dislocations accompanying RTP are presented and discussed. Results are contrasted with those from parallel studies previously conducted on low carbon content wafers.


Author(s):  
Halit Dogan ◽  
Md Mahbub Alam ◽  
Navid Asadizanjani ◽  
Sina Shahbazmohamadi ◽  
Domenic Forte ◽  
...  

Abstract X-ray tomography is a promising technique that can provide micron level, internal structure, and three dimensional (3D) information of an integrated circuit (IC) component without the need for serial sectioning or decapsulation. This is especially useful for counterfeit IC detection as demonstrated by recent work. Although the components remain physically intact during tomography, the effect of radiation on the electrical functionality is not yet fully investigated. In this paper we analyze the impact of X-ray tomography on the reliability of ICs with different fabrication technologies. We perform a 3D imaging using an advanced X-ray machine on Intel flash memories, Macronix flash memories, Xilinx Spartan 3 and Spartan 6 FPGAs. Electrical functionalities are then tested in a systematic procedure after each round of tomography to estimate the impact of X-ray on Flash erase time, read margin, and program operation, and the frequencies of ring oscillators in the FPGAs. A major finding is that erase times for flash memories of older technology are significantly degraded when exposed to tomography, eventually resulting in failure. However, the flash and Xilinx FPGAs of newer technologies seem less sensitive to tomography, as only minor degradations are observed. Further, we did not identify permanent failures for any chips in the time needed to perform tomography for counterfeit detection (approximately 2 hours).


Author(s):  
Steve K. Hsiung ◽  
Kevan V. Tan ◽  
Andrew J. Komrowski ◽  
Daniel J. D. Sullivan ◽  
Jan Gaudestad

Abstract Scanning SQUID (Superconducting Quantum Interference Device) Microscopy, known as SSM, is a non-destructive technique that detects magnetic fields in Integrated Circuits (IC). The magnetic field, when converted to current density via Fast Fourier Transform (FFT), is particularly useful to detect shorts and high resistance (HR) defects. A short between two wires or layers will cause the current to diverge from the path the designer intended. An analyst can see where the current is not matching the design, thereby easily localizing the fault. Many defects occur between or under metal layers that make it impossible using visible light or infrared emission detecting equipment to locate the defect. SSM is the only tool that can detect signals from defects under metal layers, since magnetic fields are not affected by them. New analysis software makes it possible for the analyst to overlay design layouts, such as CAD Knights, directly onto the current paths found by the SSM. In this paper, we present four case studies where SSM successfully localized short faults in advanced wire-bond and flip-chip packages after other fault analysis methods failed to locate the defects.


1990 ◽  
Vol 202 ◽  
Author(s):  
J.F. Jongste ◽  
O.B. Loopstra ◽  
G.C.A.M. Janssen ◽  
S. Radelaar

Integrated circuit fabrication consists of many processing steps: e.g. lithography, etching, implantation and metallization. Some of these processes are combined with thermal processing. Heat treatments require special attention because previous fabrication steps may be influenced: e.g. dopant profiles may be deteriorated. The amount of interference of an annealing step with a former process is determined by the ratio of the reaction rates (and hence by the difference in activation energies).


1997 ◽  
Vol 485 ◽  
Author(s):  
Chih-hung Chang ◽  
Billy Stanbery ◽  
Augusto Morrone ◽  
Albert Davydov ◽  
Tim Anderson

AbstractCuInSe2 thin films have been synthesized from binary precursors by Rapid Thermal Processing (RTP) at a set-point temperature of 290°C for 70 s. With appropriate processing conditions no detrimental Cu2-xSe phase was detected in the CIS films. The novel binary precursor approach consisted of a bilayer structure of In-Se and Cu-Se compounds. This bilayer structure was deposited by migration enhanced physical vapor deposition at a low temperature (200°C) and the influence of deposition parameters on the precursor film composition was determined. The bilayer structure was then processed by RTP and characterized for constitution by X-ray diffraction and for composition by Wavelength Dispersive X-ray Spectroscopy.


2017 ◽  
Vol 17 (1) ◽  
pp. 59-68 ◽  
Author(s):  
Mahbub Alam ◽  
Haoting Shen ◽  
Navid Asadizanjani ◽  
Mark Tehranipoor ◽  
Domenic Forte
Keyword(s):  

2001 ◽  
Vol 182 (3-4) ◽  
pp. 186-191 ◽  
Author(s):  
I.K. Robinson ◽  
I.A. Vartanyants

2016 ◽  
Vol 11 (11) ◽  
pp. C11017-C11017 ◽  
Author(s):  
T. Fíla ◽  
O. Jiroušek ◽  
A. Jung ◽  
I. Kumpová

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