Grain Enhancement of Polycrystalline Silicon Films Aided by Optical Excitation

1997 ◽  
Vol 485 ◽  
Author(s):  
B. L. Sopori ◽  
W. Chen ◽  
J. Alleman ◽  
R. Matson ◽  
N. M. Ravindra ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Low Temperatures ◽  
Polycrystalline Silicon ◽  
Optical Excitation ◽  
Grain Sizes ◽  
Si Solar Cells ◽  
A New Technique ◽  
Si Films ◽  
Polycrystalline Silicon Films

AbstractA new technique for making large-grain thin Si films is described in which optical excitation is used to enhance the grain growth. Grain sizes much larger than the film thickness can be obtained at low temperatures and in short process times. This method is well suited for making thin-film Si solar cells on low-temperature substrates.

Afm/Tem Investigation of Low Temperature Polycrystalline Silicon Grown by ECR-CVD

1995 ◽  
Vol 406 ◽  
Author(s):  
H. L. Hsiao ◽  
K. C. Wang ◽  
L. W. Cheng ◽  
A. B. Yang ◽  
T. R. Yew ◽  
...  
Keyword(s):  
Low Temperature ◽  
Polycrystalline Silicon ◽  
Electron Cyclotron Resonance ◽  
Film Growth ◽  
Chemical Vapor ◽  
Plan View ◽  
3 Dimensional ◽  
High Resolution Tem ◽  
Si Films ◽  
Polycrystalline Silicon Films

AbstractThe polycrystalline silicon films were deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD) with hydrogen dilution at 250°C and without any thermal annealing. The surface morphology and the microstructure of the poly-Si films are investigated by atomic force microscopy (AFM), plan-view transmission electron microscopy (TEM), crosssectional TEM and high resolution TEM (HRTEM). The low temperature poly-Si films deposited by ECR-CVD show a special leaf-like grain shape (plan-view) and an upside-down cone shape (3-dimensional view). The grains in the poly-Si films have preferred orientation of <112> and the longer side of the leaf-like grain is direction and the shorter side is direction. Lattice bending and interruption are found in the films. The arrangement of the atoms on the grains are well ordered, while atoms in the interfacial regions are randomly distributed. A simple grain formation model based on growth rate differences between different planes and etching effect can explain the film growth mechanism and the formation of the special grain geometry.

Low Temperature Process Technologies for the Next Generation High Performance Polycrystalline Silicon Thin-Film Transistors

2001 ◽  
Vol 685 ◽  
Author(s):  
Seiichiro Higashi ◽  
Daisuke Abe ◽  
Satoshi Inoue ◽  
Tatsuya Shimoda
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Plasma Treatment ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
High Performance ◽  
Trap States ◽  
Laser Crystallization ◽  
Si Films ◽  
Low Temperature Process

AbstractLow temperature process technologies for high performance polycrystalline silicon (poly-Si) thin-film transistors (TFTs) are discussed based on the investigations of pulsed laser crystallization, plasma treatment of poly-Si films, and SiO2/Si interface formation. Although highdensity (∼1018 cm−3) trap states localized at grain boundaries are introduced to the poly-Si films by laser crystallization, they are efficiently decreased to the order of 1016 cm−3 by following hydrogen plasma treatment. It is also shown that high quality SiO2/Si interfaces with the density of interface trap states (Dit) in the order of 1010 cm−2eV−1 are achieved using electron cyclotron resonance (ECR) plasma enhanced chemical vapor deposition (PECVD). By applying these low temperature process technologies to the fabrication process, high performance poly-Si TFTs with high n-channel mobility μn) of 187 cm2V−1s−1, low threshold voltage (Vth) of 1.97 V and small subthreshold swing (S) of 210 mV/dec. were obtained. These results indicate that the development of low temperature process technologies that can control trap states is the key to the next generation high performance poly-Si TFTs.

On the Temperature Dependence of Resistivity of Polycrystalline Silicon Films

1987 ◽  
Vol 106 ◽  
Author(s):  
Mark S. Rodder ◽  
Dimitri A. Antoniadis
Keyword(s):  
Numerical Calculation ◽  
Polycrystalline Silicon ◽  
Amorphous Region ◽  
Defect States ◽  
Temperature Dependent ◽  
Step Process ◽  
Dependent Potential ◽  
Si Films ◽  
Polycrystalline Silicon Films ◽  
P Type

ABSTRACTIt is shown that the grain boundary (GB) in polycrystalline-silicon (poly-Si) films need not be modeled as a temperature-dependent potential barrier or as an amorphous region to explain the temperature (T) dependence of resistivity (ρ) in p-type poly-Si films at low T. Specifically, we consider that QB defect states allow for the tunneling component of current to occur by a two-step process. Incorporation of the two-step process in a numerical calculation of ρ vs. T results in excellent agreement with available data from 100 K to 300 K.

Reliability of Low Temperature Polycrystalline Silicon Thin-Film Transistors with Ultrathin Gate Oxide

2007 ◽  
Vol 46 (7A) ◽  
pp. 4021-4027 ◽  
Author(s):  
Hitoshi Ueno ◽  
Yuta Sugawara ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Yukiharu Uraoka ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Gate Oxide ◽  
Silicon Thin Film
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